Provides reduced pin-count interface for Ethernet PHYs.
Provides media independent interface (MII) towards the microcontroller subsystem (MSS)-side andreduced media independent interface (RMII) on the PHY side.
Supports 25 MHz clock operation on the MII-side, 50 MHz on the RMII-side for 10/100 Mbps modeoperation.
Provides MDIO interface as defined in clause 22 of IEEE 802.3 standard to control the transfer type,the link speed and the loopback mode.
Licensing Options
Available with Gold, Platinum and Standalone licenses.
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