Conversion Tools
Migrate Your Designs With Our Conversion Scripts
Xilinx® ISE® Design Suite
Xilinx ISE was used to design on older technology, such as Spartan®-6 devices. For migration from Xilinx ISE, read our conversion instructions and use the following conversion script.
Intel® Quartus® Prime
Intel Quartus prime is the development tool for Cyclone® 10, Cyclone V, Cyclone IV, Cyclone V SoC low-cost FPGAs and SoCs and the Arria® mid-range family. Additionally, it supports MAX® II and MAX V CPLDs. For migration from Quartus Prime, read the conversion instructions and download the conversion script.
Videos and Webinars
FPGA Webinars
Support
- Make sure that Python is installed on the appropriate machine. This can be Windows®.
- Download the appropriate Python script and place it into the project directory.
- Open the command line and type the following command:
python conv_<script_version>.py <options> <file_name_of_project_file> - The scripts create *.tcl-scripts in the current directory plus a log file.
- To see available options for the script, run this script alone:
python conv_<script_version>.py - Open Libero SoC Design Suite and select the menu item “Project \ Execute Script…”, select the TCL file that was created by the conversion script and click “Run”.
- A Libero SoC Design Suite project is created with the VHDL and Verilog sources of the original project.
- Exchange the basic components and IPs as shown in the appropriate PowerPoint files.
Additional Resources
FPGA Design Services
Our FPGA design services leverage a world-class team of design experts to expedite your design cycle with guaranteed quality. We tailor our expert services to key vertical and horizontal solutions for Machine Learning (ML), Smart Embedded Vision (SEV), high-speed communications and motor control
