High speed AES256-GCM core implements the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryptographic algorithm for Authenticated Enryption with Associated Data (AEAD) purposes, as it provides both data confidentiality and authenticity. XIP1113H has been designed for easy integration with FPGA- and ASIC-based designs in a vendor-agnostic design methodology, providing both data confidentiality and authenticity.
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Features and Benefits
- Optimized resource requirements:
- Requires 44581 4-input Lookup Tables (4LUTs) for Microchip® PolarFire® .
- Does not require any multipliers, DSPBlocks or internal memory in a typical Microchip® FPGA implementation.
- Performance:
- Achieves a high throughput up to 100s of Gbps compliant with NIST Standards.
- Utilizes unrolling, pipelining, optimized AES S-box design, and GMAC calculation based on pipelined Karatsuba multipliers enable extremely high performance.
- Standard Compliance:
- Fully compliant with both the Advanced Encryption Algorithm (AES) standard, as well as with the Galois Counter Mode (GCM) standard.
- NIST support for various AES modes including GCM, CTR, XTS, ECB, CBC, CFB, and OFB.
- Easy Integration :
- Pure RTL without hidden CPU or software components.
- Vendor agnostics FPGA/ASIC implementation.
Licensing Options
For additional information contact: sales@xiphera.com or visit Xiphera
Documentation
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