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ATSAMS70J20

Status: In Production

Features:

  • ARM Cortex-M7 running at up to 300 MHz(1)
  • 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
  • Simple- and double-precision HW Floating Point Unit (FPU)
  • Memory Protection Unit (MPU) with 16 zones
  • DSP Instructions, Thumb®-2 Instruction Set
  • Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
  • Up to 2048 Kbytes embedded Flash with unique identifier and user signature for user-defined data
  • Up to 384 Kbytes embedded Multi-port SRAM
  • Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x 128 Kbytes)
  • 16 Kbytes ROM with embedded Boot Loader routines (UART0, USB) and IAP routines
  • 16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, LCD module, NOR and NAND Flash with on-the-fly scrambling
  • 16-bit SDRAM Controller (SDRAMC) interfacing up to 256 MB and with on-the-fly scrambling
  • Embedded voltage regulator for single-supply operation
  • Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation
  • Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHz needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock
  • RTC with Gregorian calendar mode, waveform generation in low-power modes
  • RTC counter calibration circuitry compensates for 32.768 kHz crystal frequency variations
  • 32-bit low-power Real-time Timer (RTT)
  • High-precision 4/8/12 MHz internal RC oscillator with 4 MHz default frequency for device startup. In-application trimming access for frequency adjustment. 8/12 MHz are factory-trimmed.
  • 32.768 kHz crystal oscillator or embedded 32 kHz (typical) RC oscillator as source of low-power mode device clock (SLCK)
  • One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations
  • Temperature Sensor
  • One dual-port 24-channel central DMA Controller (XDMAC)
  • Low-power Sleep, Wait and Backup modes, with typical power consumption down to 1.1 µA in Backup mode with RTC, RTT and wake-up logic enabled
  • Ultra-low-power RTC and RTT
  • 1 Kbyte of backup RAM (BRAM) with dedicated regulator
  • USB 2.0 Device/Mini Host High-speed (USBHS) at 480 Mbps, 4-Kbyte FIFO, up to 10 bidirectional endpoints, dedicated DMA
  • 12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)
  • Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA®, RS-485, SPI, Manchester and Modem modes; USART1 supports LON mode.
  • Five 2-wire UARTs with SleepWalking support
  • Three Two-Wire Interfaces (TWIHS) (I2 C-compatible) with SleepWalking support
  • Quad I/O Serial Peripheral Interface (QSPI) interfacing up to 256 MB Flash and with eXecute-In-Place and onthe-fly scrambling
  • Two Serial Peripheral Interfaces (SPI)
  • One Serial Synchronous Controller (SSC) with I2S and TDM support
  • Two Inter-IC Sound Controllers (I2SC)
  • One High-speed Multimedia Card Interface (HSMCI) (SDIO/SD Card/e.MMC)
  • Four Three-Channel 16-bit Timer/Counters (TC) with Capture, Waveform, Compare and PWM modes, constant on time. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor
  • Two 4-channel 16-bit PWMs with complementary outputs, Dead Time Generator and eight fault inputs per PWM for motor control, two external triggers to manage power factor correction (PFC), DC-DC and lighting control.
  • Two Analog Front-End Controllers (AFEC), each supporting up to 12 channels with differential input mode and programmable gain stage, allowing dual sample-and-hold at up to 2 Msps. Gain and offset error autotest feature.
  • One 2-channel 12-bit 1Msps-per-channel Digital-to-Analog Controller (DAC) with differential and oversampling modes
  • One Analog Comparator (ACC) with flexible input selection, selectable input hysteresis
  • True Random Number Generator (TRNG)
  • AES: 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB-197 Specifications ̶ Integrity Check Monitor (ICM). Supports Secure Hash Algorithm SHA1, SHA224 and SHA256.
  • Up to 114 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and On-die Series Resistor Termination
  • Five Parallel Input/Output Controllers (PIO)
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Overview
Documents
Development Environment
Similar Devices
RoHS Information
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Device Overview

Summary

The Microchip SAMS70J20 devices are members of a flash microcontrollers family based on the high-performance 32-bit ARM Cortex-M7 processor with Floating Point Unit (FPU). These devices operate at up to 300MHz and feature up to 2048 Kbytes of Flash, up to 384 Kbytes of multi-port SRAM and configurable Instruction and Data Tightly Couple Memories to leverage the advanced DSP capabilities of the core. SAMS70J20 features multiple communication interfaces including a HS USB Host and Device, a HS SDCard/SDIO/MMC interface, USARTs, SPIs and multiple TWIs. Analog features include dual 2Msps 12-bit ADCs with analog front end offering offset and gain error correction, and 2Msps 12-bit DAC.

The SAMS70J20 is available in 64-pin QFP and QFN package options.

Note: While there are no plans to change the availability status of Revision A for this device, new designs should use Revision B for prototypes and production.
 

Additional Features

    S70 Features

    • Core
      • ARM Cortex-M7 running at up to 300 MHz(1)
      • 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
      • Simple- and double-precision HW Floating Point Unit (FPU)
      • Memory Protection Unit (MPU) with 16 zones
      • DSP Instructions, Thumb®-2 Instruction Set
      • Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
    • Memories
      • Up to 2048 Kbytes embedded Flash with unique identifier and user signature for user-defined data
      • Up to 384 Kbytes embedded Multi-port SRAM
      • Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x 128 Kbytes)
      • 16 Kbytes ROM with embedded Boot Loader routines (UART0, USB) and IAP routines
      • 16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, LCD module, NOR and NAND Flash with on-the-fly scrambling
      • 16-bit SDRAM Controller (SDRAMC) interfacing up to 256 MB and with on-the-fly scrambling
    • System
      • Embedded voltage regulator for single-supply operation
      • Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation
      • Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHz needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock
      • RTC with Gregorian calendar mode, waveform generation in low-power modes
      • RTC counter calibration circuitry compensates for 32.768 kHz crystal frequency variations
      • 32-bit low-power Real-time Timer (RTT)
      • High-precision 4/8/12 MHz internal RC oscillator with 4 MHz default frequency for device startup. In-application trimming access for frequency adjustment. 8/12 MHz are factory-trimmed.
      • 32.768 kHz crystal oscillator or embedded 32 kHz (typical) RC oscillator as source of low-power mode device clock (SLCK)
      • One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations
      • Temperature Sensor
      • One dual-port 24-channel central DMA Controller (XDMAC)
    • Low-Power Features
      • Low-power Sleep, Wait and Backup modes, with typical power consumption down to 1.1 µA in Backup mode with RTC, RTT and wake-up logic enabled
      • Ultra-low-power RTC and RTT
      • 1 Kbyte of backup RAM (BRAM) with dedicated regulator
    • Peripherals
      • USB 2.0 Device/Mini Host High-speed (USBHS) at 480 Mbps, 4-Kbyte FIFO, up to 10 bidirectional endpoints, dedicated DMA
      • 12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)
      • Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA®, RS-485, SPI, Manchester and Modem modes; USART1 supports LON mode.
      • Five 2-wire UARTs with SleepWalking support
      • Three Two-Wire Interfaces (TWIHS) (I2 C-compatible) with SleepWalking support
      • Quad I/O Serial Peripheral Interface (QSPI) interfacing up to 256 MB Flash and with eXecute-In-Place and onthe-fly scrambling
      • Two Serial Peripheral Interfaces (SPI)
      • One Serial Synchronous Controller (SSC) with I2S and TDM support
      • Two Inter-IC Sound Controllers (I2SC)
      • One High-speed Multimedia Card Interface (HSMCI) (SDIO/SD Card/e.MMC)
      • Four Three-Channel 16-bit Timer/Counters (TC) with Capture, Waveform, Compare and PWM modes, constant on time. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor
      • Two 4-channel 16-bit PWMs with complementary outputs, Dead Time Generator and eight fault inputs per PWM for motor control, two external triggers to manage power factor correction (PFC), DC-DC and lighting control.
      • Two Analog Front-End Controllers (AFEC), each supporting up to 12 channels with differential input mode and programmable gain stage, allowing dual sample-and-hold at up to 2 Msps. Gain and offset error autotest feature.
      • One 2-channel 12-bit 1Msps-per-channel Digital-to-Analog Controller (DAC) with differential and oversampling modes
      • One Analog Comparator (ACC) with flexible input selection, selectable input hysteresis
    • Cryptography
      • True Random Number Generator (TRNG)
      • AES: 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB-197 Specifications ̶ Integrity Check Monitor (ICM). Supports Secure Hash Algorithm SHA1, SHA224 and SHA256.
    • I/O
      • Up to 114 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and On-die Series Resistor Termination
      • Five Parallel Input/Output Controllers (PIO)
Parametrics
Name
Value
Part Family
SAM S70
Max CPU Speed MHz
300
Program Memory Size (KB)
1024
SRAM (KB)
384
Auxiliary Flash (KB)
0.512
Crypto Engine
Yes
Temperature Range (C)
-40 to 105
Operating Voltage Range (V)
1.62 to 3.6
Direct Memory Access Channels
24
SPI
1
I2C
2
Peripheral Pin Select / Pin Muxing
Yes
Number of USB Modules
1
USB Interface
High Speed
ADC Input
5
Max ADC Resolution (Bits)
12
Max ADC Sampling Rate (ksps)
2000
Number of DACs
1
Input Capture
3
Standalone Output Compare/Standard PWM
3
Motor Control PWM Channels
15
Max 16-bit Digital Timers
12
Number of Comparators
1
Internal Oscillator
4,8,12Mhz, 32Khz
Hardware RTCC/RTC
Yes
Max I/O Pins
44
Pincount
64
Quadrature Encoder Interface
1

Documents

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Data Sheet

01/18/2018
16641KB

Application Notes

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Getting Started

User Guides

04/04/2018
2203KB

Development Environment

  • Demo & Evaluation Boards
  • Application Examples
Demo & Evaluation Boards
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In addition the Power Debugger has two independent current sensing channels for measuring and optimizing the power consumption of

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SAM-ICE
SAM-ICE ( AT91SAM-ICE )

SAM-ICE is a JTAG emulator designed for SAMA5, SAM3, SAM4, SAM7 and SAM9 ARM® core-based MCUs and MPUs, including Thumb mode. It supports download speeds up to 720K Bytes per second and maximum JTAG speeds up to 12 MHZ. It also supports Serial Wire Debug (SWD) and Serial Wire Viewer (SWV) from SAM-ICE hardware V6.

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SAM V71 Xplained Ultra Evaluation Kit
SAM V71 Xplained Ultra Evaluation Kit ( ATSAMV71-XULT )

The SAM V71 Xplained Ultra evaluation kit is ideal for evaluating and prototyping with the SAM V71, SAM V70, SAM S70 and SAM E70 ARM® Cortex®-M7 based microcontrollers. Xplained Pro Extension kits compatible with SAM V71 Xplained Ultra can be purchased individually.

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SAME70 Xplained Kit ( ATSAME70-XPLD )

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Extension boards for the SAM E70 Xplained can be purchased individually.

The ATSAME70-XPLD evaluation kit does not include extension boards.

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
ATSAMS70J20A-AN
0.166700
1.087500
64
LQFP
10x10x1.4mm
Matte Tin
e3
ATSAMS70J20A-ANT
0.166700
0.366667
64
LQFP
10x10x1.4mm
Matte Tin
e3
ATSAMS70J20B-AN
0.166700
1.087500
64
LQFP
10x10x1.4mm
Matte Tin
e3
ATSAMS70J20B-ANT
0.166700
0.366667
64
LQFP
10x10x1.4mm
Matte Tin
e3
ATSAMS70J20A-MN
0.189200
1.069231
64
VQFN
9x9x0.9mm
Matte Tin
e3
ATSAMS70J20A-MNT
0.189200
0.287143
64
VQFN
9x9x0.9mm
Matte Tin
e3
ATSAMS70J20B-MN
0.189200
1.069231
64
VQFN
9x9x0.9mm
Matte Tin
e3
ATSAMS70J20B-MNT
0.189200
0.287143
64
VQFN
9x9x0.9mm
Matte Tin
e3
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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