High speed AES128-CTR IP core implements the Advanced Encryption Standard (AES) in Counter Mode (CTR) with few tens of Gbps linerate. The IP core effectively turns a block cipher into a stream cipher, and provides a number of advantages for optimising resource usage and performance.
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Features and Benefits
- Moderateresource requirements:
- Requires 17076 Adaptive Lookup Modules (ALMs) and does not require any multipliers or DSPBlocks.
- Performance:
- Despite its moderate size, XIP1103H achieves a throughput in the tens of Gbps range.
- Up to 100s of Gbps Compliant with NIST standards CAVP validated by NIST Support for various AES modes including GCM, CTR, XTS, ECB, CBC, CFB, and OFB.
- Standard Compliance:
- Fully compliant with both the Advanced Encryption Algorithm (AES) standard [1], as well as with the Counter Mode (CTR) standard [2].
- Easy Integration :
- Pure RTL without hidden CPU or software components.
- Vendor agnostics FPGA/ASIC implementation.
Licensing Options
For additional information contact: sales@xiphera.com or visit Xiphera
Documentation
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