Status: In Production
The HV6810 is a monolithic integrated circuit designed to drive a dot matrix or segmented vacuum fluorescent display (VFD). These devices feature a serial data output to cascade additional devices for large displays. A 10-bit data word is serially loaded into the shift register on the positive-going transition of the clock. Parallel data is transferred to the output buffers through a 10-bit D-type latch while the latch enable input is high, and is latched when the latch enable is low. When the blanking input is high, all of the outputs are low. Outputs are structures formed by double-diffused MOS (DMOS) transistors with output voltage ratings of 80V and 25mA source-current capability. All inputs are compatible with CMOS levels.
Development tools data is currently unavailable.
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