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Lowest-Power, Smallest-Packages, Low-Density FPGAs


SmartFusion® System-on-Chip (SoC) FPGAs are the only devices that integrate an FPGA fabric, Arm® Cortex®-M3 processor, and programmable analog circuitry, Offering the benefits of full customization and IP protection while still being easy to use. Based on a proprietary Flash process, SmartFusion SoC FPGAs are excellent for hardware and embedded designers who need a true SoC solution that gives more flexibility than traditional fixed-function microcontrollers without the excessive cost of soft processor cores on traditional FPGAs.

Key Features


Microcontroller Subsystem (MSS):

  • Hardware industry-standard 100 MHz, 32-bit Arm® Cortex®-M3 CPU
  • Multi-layer AHB communication matrix with up to 16 Gbps throughput
  • 10/100 Ethernet MAC with RMII interface
  • Two of each: SPI, I2C, UART, 32-bit timers
  • Up to 512 KB Flash and 64 KB of SRAM
  • External Memory Controller (EMC)
  • 8-channel DMA controller
  • Up to 41 MSS I/Os with Schmitt trigger inputs
  • 25 I/Os can be used as FPGA I/Os

FPGA Fabric:

  • Based on our proven ProASIC® 3 FPGA architecture
  • 200,000 to 500,000 system gates with 350 MHz system performance
  • Embedded SRAMs and FIFOs
  • Variable aspect ratio 4,608-bit SRAM blocks
  • x1, x2, x4, x9 and x18 organizations
  • True dual-port SRAM (including x18)
  • Up to 128 FPGA I/Os supporting LVDS, PCI, PCI-X and LVTTL/LVCMOS standards

Programmable Analog:

  • High-performance analog signal conditioning blocks (SCB) with voltage, current and temperature monitors
  • Analog Compute Engine (ACE) offloads CPU from analog initialization and processing of Analog-to-Digital Conversion (ADC), Digital-to-Analog Conversion (DAC) and SCBs
  • Integrated ADCs and DACs with 1% accuracy
  • 12-/10-/8-bit mode ADCs with 500/550/600 Ksps sampling rate
  • Up to ten 15 ns high-speed comparators
  • Up to 32 analog inputs and three outputs
Features

A2F200

A2F500

FPGA Fabric

PQ208

CS288

FG256

FG484

PQ208

CS288

FG256

FG484

System Gates

200,000

500,000

Equivalent LEs

2K

6K

Tiles (D-Flip-Flops)

4,608

11,520

RAM Blocks (4,608 bits)

8

24

 

A2F200

A2F500

Microcontroller Subsystem (MSS)

PQ208

CS288

FG256

FG484

PQ208

CS288

FG256

FG484

Flash (Kbytes)

256

512

SRAM (Kbytes)

64

64

Arm® Cortex®-M3 Processor with MPU

Yes

Yes

10/100 Ethernet MAC

Yes

Yes

External Memory
Controller (EMC)

26- bit address/16- bit data

—

26- bit address/16- bit data

DMA

8 Ch

8 Ch

I2C

2

2

SPI

1

2

1

2

16550 UART

2

2

32-Bit Timer

2

2

PLL

1

1

2

1

2

32 KHz Low-Power
Oscillator

1

1

100 MHz On-Chip RC
Oscillator

1

1

Main Oscillator (32 kHz to
20 MHz)

1

1

 

A2F200

A2F500

Programmable Analog

PQ208

CS288

FG256

FG484

PQ208

CS288

FG256

FG484

ADCs (8-/10-/12-bit SAR)

2

2

3

DACs (8-/16-/24-bit sigma-delta)

2

2

3

Signal Conditioning Blocks
(SCBs)

4

4

5

Comparators1

8

8

10

Current Monitors1

4

4

5

Temperature Monitors1

4

4

5

Bipolar High Voltage
Monitors1

8

8

10

Temperature Grade

C, I

C, I, M

Notes:

  1. These functions share I/O pins and may not all be available at the same time. See the "Analog Front-End Overview" section in the SmartFusion FPGA Analog UG for details.

Packaging and I/Os


Device

A2F2002

A2F5002

Package

PQ208

CS288

FG256

FG484

PQ208

CS288

FG256

FG484

Direct Analog Inputs

8

8

8

8

8

8

8

12

Shared Analog Inputs

16

16

16

16

16

16

16

20

Total Analog Inputs

24

24

24

24

24

24

24

32

Total Analog Outputs

1

2

2

2

1

2

2

3

MSS I/Os3,4

22

31

25

41

22

31

25

41

FPGA I/Os

66

78

66

94

666

78

66

128

Total I/Os

113

135

117

161

113

135

117

204

Notes:

  1. There are no LVTTL-capable direct inputs available on A2F060 devices
  2. These pins are shared between direct analog inputs to the ADCs and voltage/current/temperature monitors.
  3. Sixteen MSS I/Os are multiplexed and can be used as FPGA I/Os, if not needed for MSS. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5/1.8/2.5, 3.3V) standards.
  4. Nine MSS I/Os are primarily for 10/100 Ethernet MAC and are also multiplexed and can be used as FPGA I/Os if Ethernet MAC is not used in a design. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5/1.8/2.5, 3.3V standards.
  5. 10/100 Ethernet MAC is not available on A2F060.
  6. EMC is not available on the A2F500 PQ208 and A2F060 TQ144 package

SmartFusion System-on-Chip (SoC) FPGAs are the only devices that integrate an FPGA fabric, Arm Cortex-M3 processor and programmable analog circuitry, offering the benefits of full customization and IP protection, while still being easy to use. Based on a proprietary Flash process, SmartFusion SoC FPGAs are excellent for hardware and embedded designers who need a true SoC solution that gives more flexibility than traditional fixed-function microcontrollers without the excessive cost of soft processor cores on traditional FPGAs.

Kits and Hardware


Part Number: Quantity: Price per Unit (in USD): Total Amt:
A2F500-DEV-KIT-2

This full-featured development kit enables you to evaluate the world's only FPGA with a hard Arm® Cortex®-M3 core and programmable analog. The device contains on-chip Flash and SRAM memory. Off-chip memory is also available on the board. The board can communicate via Ethernet and HyperTerminal. 

A2F-EVAL-KIT-2

This kit offers a simple, low-cost way to try the world's only FPGA with a hard Arm® Cortex®-M3 core and programmable analog.

MIXED-SIGNAL-DC

This daughter card is designed for connection to the mixed- signal header on the SmartFusion Evaluation Kit (A2F-EVAL-KIT-2) or SmartFusion® Development Kit (A2F500-DEV-KIT-2).

DMPM-DC-KIT

This daughter card can be used to evaluate the functionality of our power management solutions. It supports up to 64 channels, mixed analog and digital Point of Load (POL) control, PMBus® support for digital POLs, and margining and trimming for analog POLs.

Part Number: Quantity: Price per Unit (in USD): Total Amt:
FLASHPRO5

FlashPro5 offers high performance through USB 2.0 that supports Serial Peripheral Interconnect (SPI) and JTAG interfaces.

FLASHPRO4

FlashPro4 is designed for JTAG programming of older Microchip FPGA families, including IGLOO, ProASIC3, SmartFusion, and Fusion. It is suitable for existing designs that do not require SPI Slave programming, advanced debugging, or high-speed programming

SILICON-SCULPTOR-4

Silicon Sculptor 4 CE-compliant production device programmer works alongside Silicon Sculptor adapter modules to program the FPGA devices. It concurrently programs large FPGA parts without performance degradation.

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