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CORERSENC

CoreRSENC is an register transfer level (RTL) generator that produces a Microchip system-on-chip(SoC) Products Group FPGA?optimized Reed-Solomon (RS) encoder core based on user-definedparameters.


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Features and Benefits

  • Parameterizable RS Encoder generator
  • Supports arbitrary time intervals between the output code words, including zero interval
  • Symbol widths from 3 to 8 bits
  • Supports shortened code
  • Supports any valid primitive polynomial for a given symbol width
  • Supports CCSDS-16 and CCSDS-8 encoding
  • In the CCSDS mode supports data encoding presented in conventional or dual basis

    • Licensing Options

    Available as part of Libero Gold, Platinum and Standalone licenses

     

     

    Documentation

    Title
    CoreRSENC_HB.pdf Download



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