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ZL30123

SONET/SDH Line Card System Synchronizer

Status: In Production

Features:

  • Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-253-CORE and ITU-T G.813
  • Internal APLL provides standard output clock frequencies up to 622.08 MHz with jitter < 3 ps RMS suitable for GR-253-CORE OC-12 and G.813 STM-16 interfaces
  • Provides two DPLLs which are independently configurable through a serial peripheral interface
  • Programmable output synthesizers (P0, P1) generate clock frequencies from any multiple of 8 kHz up to 77.76 MHz in addition to 2 kHz
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Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

The ZL30123 SONET/SDH Line Card Synchronizer is a highly integrated device that provides timing and synchronization for network interface cards. It incorporates two independent DPLLs, each capable of locking to one of eight input references and provides a wide variety of synchronized output clocks and frame pulses.

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Additional Features
  • Typical Applications
    • AMCs for AdvancedTCATMand MicroTCA Systems
    • Multi-Service Edge Switches or Routers
    • DSLAM Line Cards
    • WAN Line Cards
    • RNC/Mobile Switching Center Line Cards
    • ADM Line Cards
  • Features & Benefits
    • Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-253-CORE and ITU-T G.813
    • Internal APLL provides standard output clock frequencies up to 622.08 MHz with jitter < 3 ps RMS suitable for GR-253-CORE OC-12 and G.813 STM-16 interfaces
    • Provides two DPLLs which are independently configurable through a serial peripheral interface
    • Programmable output synthesizers (P0, P1) generate clock frequencies from any multiple of 8 kHz up to 77.76 MHz in addition to 2 kHz
    • Provides 8 reference inputs which support clock frequencies with any multiples of 8 kHz up to 77.76 MHz in addition to 2 kHz
    • Provides 3 sync inputs for output frame pulse alignment
    • Generates several styles of output frame pulses with selectable pulse width, polarity, and frequency
    • Configurable input to output delay, and output to output phase alignment
Parametrics
Name
Value
Type
SyncE
DPLLs or Paths
2
DPLL Bandwidth (Hz)
14Hz to 890Hz
Inputs
8+3
Diff Outputs
2
CMOS Outputs
10+1
Low-Jitter Synthesizers
1
General Purpose Synthsizers
3
Typical Jitter (12kHz-20MHz) fs RMS
3
Diff InputFreq Range
-
Output Freq Range
2kHz to 622.08MHz
NV Memory
-
NCO ppb
-
Align
-

Documents

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Data Sheets

  
350KB

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Dimension
Solder Composition
JEDEC Indicator
RoHS
China EFUP
ZL30123GGG2
0.324600
0.630769
100
LFBGA
9x9x1.72mm
SAC305
e1
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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