Status: In Production
The USB3280 provides the Physical Layer (PHY) interface to a USB 2.0 Device Controller. The IC is available in a 36-pin RoHS compliant QFN.
The USB3280 is an industrial temperature USB 2.0 physical layer transceiver (PHY) integrated circuit. Microchip's proprietary technology results in low power dissipation, which is ideal for building a bus powered USB 2.0 peripheral. The PHY uses an 8-bit bidirectional parallel interface, which complies with the USB Transceiver Macrocell Interface (UTMI) specification. It supports 480Mbps transfer rate, while remaining backward compatible with USB 1.1 legacy protocol at 12Mbps.
All required termination and 5.25V short circuit protection of the DP/DM lines are internal to the chip. The USB3280 also has an integrated 1.8V regulator so that only a 3.3V supply is required.
While transmitting data, the PHY serializes data and generates SYNC and EOP fields. It also performs needed bit stuffing and NRZI encoding. Likewise, while receiving data, the PHY de-serializes incoming data, stripping SYNC and EOP fields and performs bit un-stuffing and NRZI decoding.
The USB3280 is the ideal companion to any ASIC, SoC or FPGA solution designed with a UTMI Hi-Speed USB device (peripheral) core.
The USB3280 is well suited for:
Development tools data is currently unavailable.
For pricing and availability, contact Microchip Local Sales.