MIV RV32

MIV_RV32 is a RISC-V processor core for building soft processor subsystems inside Microchip FPGA designs. It gives designers a configurable compute element for control, monitoring, and embedded software workloads without requiring an external microcontroller. The core fits systems that need a standards-based processor tightly integrated with FPGA fabric, local memory, and system peripherals. Its architecture combines a pipelined RISC-V hart with a processor subsystem that supports local execution, external memory access, interrupt handling, and debug visibility. This approach helps engineers partition time-critical hardware into logic while keeping application control and system management in software. Optional instruction set extensions let the core align with integer, compressed, multiply, divide, and floating-point software requirements. Built-in debug support simplifies bring-up and software development, while optional trace output supports observability and lockstep monitoring strategies. The core also supports configurable memory boot behavior, which helps systems start from accessible memory regions and adapt to different initialization schemes. Optional reliability-oriented choices support applications that prioritize fault handling and predictable operation. MIV_RV32 delivers the most value in FPGA-based embedded control systems, subsystem management functions, and mixed hardware-software architectures where a compact soft processor enables flexible system behavior.