CoreAHBLSRAM provides access to the embedded large SRAM (LSRAM) and small SRAM (USRAM) blocks present on SmartFusion2 system-on-chip (SoC) field programmable gate array (FPGA) family devices through AHB-Lite slave interface. It facilitates convenient access to SRAM by AHB masters.
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Features and Benefits
- Configurable parameter to utilize either LSRAM or USRAM memory
- Merges multiple SRAM blocks to form large SRAMs or USRAMs
- AHB interface with data width of 32-bits
Licensing Options
Free with any Libero license
Documentation
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