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dsPIC33EDV64MC205

Motor Control DSC with Motor Driver

Status: Samples Available

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Device Overview

Summary

The dsPIC33EDV64MC205 System in Package (SiP) combines a 70 MIPS dsPIC® DSC core with a 12-volt 3-phase MOSFET Gate Driver.  This SiP is designed for high-performance, precision motor control systems that require a compact size. Its idea for control of brushless DC, permanent magnet synchronous and AC induction motors.

Additional Features
  • 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
  • 3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
  • Modified Harvard Architecture
  • C Compiler Optimized Instruction Set
  • 16-bit Wide Data Path
  • 24-bit Wide Instructions
  • 16x16 Integer Multiply Operations
  • 32/16 and 16/16 Integer Divide Operations
  • Two 40-bit Accumulators with Rounding and Saturation Options
  • Single-Cycle Multiply and Accumulate
  • Single-Cycle shifts for up to 40-bit Data
  • 16x16 Fractional Multiply/Divide Operations
  • Up to three PWM pairs with independent timing
  • Dead time for rising and falling edges
  • 7.14 ns PWM resolution
  • PWM support for: Inverters, PFC, Lighting BLDC, PMSM, ACIM, SRM
  • Inverters, PFC, Lighting
  • BLDC, PMSM, ACIM, SRM
  • Programmable Fault inputs
  • 3.0V to 3.6V, -40ºC to +150ºC, DC to 40 MIPS
  • Flexible trigger configurations for ADC conversions
  • ADC module: Configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H
  • Configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H
  • Up to three Op amp/Comparators: Op Amp direct connection to the ADC module Additional dedicated comparator Programmable references with 32 voltage points for comparators
  • Op Amp direct connection to the ADC module
  • Additional dedicated comparator
  • Programmable references with 32 voltage points for comparators
  • Charge Time Measurement Unit (CTMU): Supports mTouch™ capacitive touch sensing
  • Supports mTouch™ capacitive touch sensing
  • 12 general purpose timers: Five 16-bit and up to two 32-bit timers/counters Four OC modules configurable as timers/counters PTG module with two configurable timers/counters 32-bit Quadrature Encoder Interface (QEI) module configurable as a timer/counter
  • Five 16-bit and up to two 32-bit timers/counters
  • Four OC modules configurable as timers/counters
  • PTG module with two configurable timers/counters
  • 32-bit Quadrature Encoder Interface (QEI) module configurable as a timer/counter
  • Four IC modules
  • Peripheral Trigger Generator (PTG) for scheduling complex sequences
  • Two UART modules (15 Mbps)
  • Two 4-wire SPI modules (15 Mbps)
  • Two I2C™ modules (up to 1 Mbaud) with SMBus support
  • PPS to allow function remap
  • Programmable Cyclic Redundancy Check (CRC)
  • 4-channel DMA with user-selectable priority arbitration
  • UART, SPI, ADC, IC, OC, and Timers
Parametrics
Name
Value
Architecture
16-bit
Max CPU Speed (MHz)
70
CPU Speed (MIPS/DMIPS)
70
Program Memory Size (KB)
64
SRAM (KB)
8
Direct Memory Access Channels
4
Temperature Range (C)
-40 to 150
Operating Voltage Range (V)
3 to 3.6
Pin Count
52
Comparators
4
Analog Peripherals
1-A/D 9x12-bit @ 1100(ksps) 1-D/A 0x4-bit
UART
2
SPI
2
I2C
2
Timers
5 x 16-bit 2 x 32-bit
Motor Control PWM Outputs
6
Input Capture
4
Max PWM outputs (including complementary)
10
Number of PWM Time Bases
2
Output Compare Channels
4
Class B Hardware
Yes
Quadrature Encoder Interface
1
Peripheral Trigger Generator
Yes
Peripheral Pin Select / Pin Muxing
Yes
Supported in MPLAB Code Configurator
Yes

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MPLAB ICD 3 In-Circuit Debugger
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Flash (KB)
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Notes
52
64
8
 
DSP, HS-PWM

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