The Tachyon® 12G SAS 16-port controller enables software leverage between controllers and protocols, providing system designers with end-to-end diagnostics and error handling mechanisms to increase system performance, availability, and most importantly, manageability. Unique end-to-end features and algorithms can be achieved from host to hard disk drive by using these controllers in combination with Microchip’s market-leading maxSAS family of SAS/SATA expanders, multiplexers, and enclosure management solutions.

For product comparison, please consider: PM8072, PM8071, PM8070

• Wide target support enables high-performance, front-end SAS applications, or can be used for host-host failover coordination
• End-to-end system diagnostics and error handling mechanisms from host to hard disk drive
• Enables cost-effective secure data SAS/SATA encryption solution across both HDD and SSD devices
• FIPS 140-2 Level 3-certifiable solution meets the most stringent data security requirements
• Support for up to 4K SAS addresses
• Support for up to 8K outstanding I/Os
• Support for wide-port initiator and wide-port target modes
• Encryption
• IEEE 1619-compliant line rate AES-XTS for data-at-rest encryption
• 256-bit key size supported
• FIPS 140-2, Levels 1–3 certifiable
• Secure key encryption key (KEK) management
• Support for 4M data encryption keys (DEKs) and eight KEKs
• KMIP-compliant key blob support
• SAS/SATA
• SAS initiator, SAS target, or SATA HBA operation on a per-PHY basis
• SSP, SMP, STP, and direct-attached SATA protocol support
• A single SAS PHY supports up to 1.2 GB/s of bandwidth
• Initiator and target mode configurable on a per-PHY basis
• Hot-plug and SATA NCQ support
• SAS 2.1 optical support
• PCIe Express (PCIe)
• Eight-lane native PCIe-compliant 2.5 Gbps (PCIe 1.1), 5 Gbps (PCIe 2.0), and 8 Gbps PHYs (PCIe 3.0)
• Support for Statistics and Performance Monitoring
• Enhanced SAS error monitoring and fault isolation
• SAS topology monitoring and fault determination
• High-Speed I/O
• Independent per-channel, selectable high-speed outputs support multiple programmable levels of pre-emphasis and output swing
• Independent per-channel, selectable high-speed inputs support multiple programmable levels of receive equalization
• Integrated resistive termination
• Automatic negotiation of link speed
• Decision feedback equalizer provides robust recovery of 12 Gbps SAS signals over lossy channels
• T10 DIF
• Verification, insertion, and replacement of T10 data integrity fields (DIF) as defined by SBC-2
• Test and Control
• Power and reset control
• Configurable Peripheral Interfaces
• Interfaces for NOR flash memory and SEEPROM
• Four two-wire interfaces (TWIs) support variable rates up to 400 kHz
• Two industry-standard 16750 UARTs
• Four SFF-8485-compliant serial GPIO (SGPIO) ports
• 16 customer-configurable GPIO pins