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PIC24FJ128GA610

Low Power MCU w/128KB Dual Flash, Live Update

Status: In Production

Features:

  • Up to 16 MIPS Operation @ 32 MHz
  • Dual Partition Flash with Live Update Capability
  • Capable of Holding Two Independent Software Applications, including Bootloader
  • Permits Simultaneous Programming of One Partition while Executing Application Code from the Other
  • Sleep and Idle modes Selectively Shut Down Peripherals and/or Core for Substantial Power Reduction and Fast Wake-up
  • Eight-Channel DMA Supports All Peripheral modules
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Overview
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Development Environment
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RoHS Information
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Device Overview

Summary

The eXtreme low power, PIC24F MCU includes up to 128KB of Flash memory with Error Correction Code (ECC) and 32 KB of RAM. This device features dual-partition Flash with Live Update capability, enabling them to hold two independent software applications, permitting simultaneous programming of one partition while executing application code from the other. With the ability to perform over-the-air firmware updates, designers can provide a cost-effective, reliable and secure method for updating their applications. These MCUs also feature eXtreme low power modes with current consumptions as low as 300nA in sleep modes.

This powerful combination of features makes the PIC24F “GA6” family ideal for industrial, computer, medical/fitness and portable applications that require a long battery life, and data transfer and storage without the need of external memory, such as electricity metering, HVAC control, fingerprint scanners and gaming.

Additional Features
  • CPU
    • Modified Harvard Architecture
    • Up to 16 MIPS Operation @ 32 MHz
    • 8 MHz Internal Oscillator:
    • 96 MHz PLL option
    • Multiple clock divide options
    • Run-time self-calibration capability for maintaining better than ±0.20% accuracy
    • Fast start-up
    • 17-Bit x 17-Bit Single-Cycle Hardware Fractional/Integer Multiplier
    • 32-Bit by 16-Bit Hardware Divider
    • 16 x 16-Bit Working Register Array
    • C Compiler Optimized Instruction Set Architecture
    • Two Address Generation Units for Separate Read and Write Addressing of Data Memory
  • Live Update
    • Dual Partition Flash with Live Update Capability
    • Capable of Holding Two Independent Software Applications, including Bootloader
    • Permits Simultaneous Programming of One Partition while Executing Application Code from the Other
    • Allows Run-Time Switching Between Active Partitions
  • Low-Power Features
    • Sleep and Idle modes Selectively Shut Down Peripherals and/or Core for Substantial Power Reduction and Fast Wake-up
    • Doze mode Allows CPU to Run at a Lower Clock Speed than Peripherals
    • Alternate Clock modes Allow On-the-Fly Switching to a Lower Clock Speed for Selective Power Reduction
  • Analog Features
    • 10/12-Bit, up to 24-Channel Analog-to-Digital (A/D) Converter:
    • 12-bit conversion rate of 200 ksps
    • Auto-scan and threshold compare features
    • Conversion available during Sleep
    • Three Rail-to-Rail, Enhanced Analog Comparators with Programmable Input/Output Configuration
    • Charge Time Measurement Unit (CTMU):
    • Used for capacitive touch sensing, up to 24 channels
    • Time measurement down to 100 ps resolution
  • Peripheral Features
    • Peripheral Pin Select (PPS) –Allows Independent I/O Mapping of Many Peripherals
    • Eight-Channel DMA Supports All Peripheral modules
    • Six Input Capture modules, Each with a Dedicated 16-Bit Timer
    • Six Output Compare/PWM modules, Each with a Dedicated 16-Bit Timer
    • Four Single Output CCPs (SCCPs) and Three Multiple Output CCPs (MCCPs)
    • Enhanced Parallel Master/Slave Port (EPMP/EPSP)
    • Hardware Real-Time Clock/Calendar (RTCC) with Timestamping
    • Programmable 32-Bit Cyclic Redundancy Check (CRC) Generator
    • Four Configurable Logic Cells (CLCs)
    • 5.5V Tolerant Inputs on Multiple I/O Pins
Parametrics
Name
Value
Architecture
16-bit
Max CPU Speed (MHz)
32
CPU Speed (MIPS/DMIPS)
16
Program Memory Size (KB)
128
Multiple Flash Panels
Yes
Error Correction Code Program Flash
Yes
SRAM (KB)
32
Direct Memory Access Channels
8
Temperature Range (C)
-40 to 125
Operating Voltage Range (V)
2 to 3.6
Pin Count
100
Low Power
Yes
Comparators
3
Analog Peripherals
1-A/D 24x12-bit @ 200(ksps)
UART
6
SPI
3
I2C
3
Timers
5 x 16-bit 2 x 32-bit
Hardware RTCC/RTC
Yes
Input Capture
6
Max PWM outputs (including complementary)
6
Number of PWM Time Bases
1
Output Compare Channels
6
Configurable Cell Logic
4
Peripheral Pin Select / Pin Muxing
Yes
Supported in MPLAB Code Configurator
Yes

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Development Environment

  • Integrated Development Environments
  • Emulators & Debuggers
  • Programmers
  • Demo & Evaluation Boards
  • Software Libraries
Integrated Development Environments
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PICkit 3 In-Circuit Debugger
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Native Trace:True
SPI Trace:True (Requires Compiler Support)


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Programmers
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PICkit 3 In-Circuit Debugger
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  • Socket: AC164357   PartNo: PIC24FJ128GA610 (100PT)
  • Socket: AC164342   PartNo: PIC24FJ128GA610 (121BG)
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MPLAB ICD 3 In-Circuit Debugger
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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (grams)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
PIC24FJ128GA610T-I/BG
0.192400
0.481818
121
TFBGA
10x10x1.20mm
SAC
e1
PIC24FJ128GA610-I/BG
0.192400
1.777174
121
TFBGA
10x10x1.20mm
SAC
e1
PIC24FJ128GA610-E/BG
0.192400
1.777174
121
TFBGA
10x10x1.20mm
SAC
e1
PIC24FJ128GA610-I/PT
0.391000
1.596639
100
TQFP
12x12x1mm
Matte Tin
e3
PIC24FJ128GA610T-I/PT
0.391000
1.333333
100
TQFP
12x12x1mm
Matte Tin
e3
PIC24FJ128GA610-E/PT
0.391000
1.596639
100
TQFP
12x12x1mm
Matte Tin
e3
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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