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MIC59P50

8-Bit Parallel Input Protected Latched Driver

Status: In Production

Features:

  • 4.4 MHz Minimum Data Input Rate
  • High-Voltage, High-Current Outputs
  • Per-Output Over-Current Shutdown (500mA Typical)
  • Undervoltage Lockout
  • Thermal Shutdown
  • Output Fault Flag
  • Output Transient Protection Diodes
  • CMOS-, PMOS-, NMOS-, and TTL-compatible Inputs
  • Internal Pull-Down Resistors
  • Low-Power CMOS Latches
  • Single or Split Supply Operation
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Overview
Documents
Development Environment
Similar Devices
RoHS Information
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Device Overview

Summary

The MIC59P50 parallel-input latched driver is a high-voltage (80V), high-current (500mA) integrated circuit comprised of eight CMOS data latches, a bipolar Darlington transistor driver for each latch, and CMOS control circuitry for the common CLEAR, STROBE, and OUTPUT ENABLE functions. Similar to the MIC5801, additional protection circuitry supplied on this device includes thermal shutdown, under voltage lockout (UVLO), and over-current shutdown. The bipolar/MOS combination provides an extremely low-power latch with maximum interface flexibility. The MIC59P50 has open-collector outputs capable of sinking 500mA and integral diodes for inductive load transient suppression with a minimum output breakdown voltage rating of 80V above VEE (50V sustaining). The drivers can be operated with a split supply, where the negative supply is down to -20V and may be paralleled for higher load current capability. With a 5V logic supply, the MIC59P50 will typically operate at better than 5MHz. With a 12V logic supply, significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS circuits. TTL circuits may require pull-up resistors. Each of these eight outputs has an independent over-current shutdown at 500 mA. Upon current shutdown, the affected channel will turn OFF and the flag will go low until VDD is cycled or the ENABLE/RESET pin is pulsed high. Current pulses less than 2µs will not activate over-current shutdown. Temperatures above 165°C will shut down the device and activate the open collector FLAG output at pin 1. The UVLO circuit disables the outputs at low VDD; hysteresis of 0.5V is provided.

Additional Features
    • 4.4 MHz Minimum Data Input Rate
    • High-Voltage, High-Current Outputs
    • Per-Output Over-Current Shutdown (500mA Typical)
    • Undervoltage Lockout
    • Thermal Shutdown
    • Output Fault Flag
    • Output Transient Protection Diodes
    • CMOS-, PMOS-, NMOS-, and TTL-compatible Inputs
    • Internal Pull-Down Resistors
    • Low-Power CMOS Latches
    • Single or Split Supply Operation
Parametrics
Name
Value
Type
Sink
Output Channels
8
Vout (V) operating – Transient
80
Vout (V) Operating - Sustained
80
Iout (mA) per Channel
500
Output Structure
Darlington Open Collector
Input Structure
Parallel
Minimum Data Clock (MHz)
--
General Description
8-Bit Parallel Input Protected Latched Driver
Package
24/SOIC 300mil 28/PLCC 24/PDIP 600mil

Documents

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Data Sheet

11/09/2015
667KB

Development tools data is currently unavailable.

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
MIC59P50BWM-TR
1.000000
24
SOIC
.300in
SnPb
e0
MIC59P50YV-TR
1.205700
2.028933
28
PLCC
-
Matte Tin
e3
MIC59P50YV
1.205700
1.787932
28
PLCC
-
Matte Tin
e3
MIC59P50YWM
0.662000
1.645161
24
SOIC
.300in
Matte Tin
e3
MIC59P50YWM-TR
0.662000
1.000000
24
SOIC
.300in
Matte Tin
e3
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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