Microchip's LAN7431 is a PCIe 3.1 (at 2.5GT/s) to Reduced Gigabit Media Independent Interface (RGMII) Gigabit Networking bridge providing an ultra-high-performance and cost-effective PCIe to Ethernet connectivity solution.  LAN7431 contains an integrated RGMII interface, PCIe PHY, PCIe endpoint controller, 10/100/1000 Gigabit Ethernet MAC, Integrated OTP, JTAG TAP and EEPROM controller.

PCIe-based networking provides flexibility for the routing and placement of network connections anywhere in the system.  Specific enhancements for PCIe LPSS (Low Power Sub-States) L1.1 and LPSS L1.2 have been integrated to lower system power consumption.   LAN7431 is available with a wide range of drivers including Windows®,  Linux®, and Pseudo Code for development towards RTOS. LAN7431 also supports Precision Time Protocol using industry standard 1588-2008 PTP.  GPIOs are provided that can be software defined for this function.  Included within this feature is a programmable timer compare output that can also be software configured.

The LAN7431 integrates all needed voltage regulators and requires only a single 3.3V supply.  Further BOM savings can be realized through the integrated clock tree only requiring one external crystal or clock source.  An EEPROM interface is provided although is not mandatory - an integrated OTP memory can provide for configuration data, further reducing system design cost and burden.

Multiple power management features are provided, including various low-power modes and Link Status Change wake events.  These wake events can be programmed to initiate a PCIe beacon, and if desired, also generate a hardware PME event.
The device is available in commercial (0° to 70°C) and industrial temperature range (-40° to 85°C) and automotive grade 2 (-40° to 105°C)

Microchip's complimentary and confidential LANCheck® online design review service is available for customers who have selected our products for their application design-in*.

• Single-chip, PCIe 3.1 @ 2.5GT/s MII / RGMII Network Controller
• PCIe Low Power Sub State LPSS L1.1 (snooze) & L1.2 (off)
• Requires only a single 25MHz crystal or single ended clock
• 9K jumbo frames are supported
• Internal OTP memory to remove the need for external EEPROM
• RGMII / MII
• RGMII v1.3, v2.0 with option for programmable delay
• Variable IO power supplies in the range 1v8 to 3v3
• IEEE 1588-2008 Precision Time Protocol
• IEEE 1588-2008 E2E and P2P one and two step supported
• IEEE 1588-2008 Programmable Time Compare output (Eg: 1PPS)
• Comprehensive Driver Support
• Windows OneCore with WHQL Certification
• Linux driver in mainline kernel
• Application Examples
• PCIe Dual Ethernet Port Example - Using PCIe bridge and Ethernet switch
• PCIe Ethernet Development System (EDS)