Status: In Production
The KSZ9897 is a fully integrated layer 2, managed, seven-port gigabit Ethernet switch with numerous advanced features. Five of the seven ports incorporate 10/100/1000 Mbps PHYs. The other two ports have interfaces that can be configured as SGMII, RGMII, MII or RMII. Either of these may connect directly to a host processor or to an external PHY.
Full register access is available by SPI or I2C interfaces, and by optional in-band management via any of the data ports. PHY register access is provided by a MIIM interface.
Security features include support for IEEE 802.1X port-based authentication and Access Control List (ACL) filtering.
An assortment of power-management features including Energy-Efficient Ethernet (EEE) have been designed in to satisfy energy efficient environments.
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Non-blocking wire-speed Ethernet switching fabric
Full-featured forwarding and filtering control, including Access Control List (ACL) filtering
IEEE802.1X support (Port-Based Network Access Control)
IEEE802.1Q VLAN supportfor 128 active VLAN groups and the full range of 4096 VLAN IDs
IEEE802.1p/Q tag insertion or removal on a per port basis and support for double-tagging
VLAN ID tag/untag options on per port basis
IEEE802.3x full-duplex flow control and half-duplex back pressure collision control
IGMPv1/v2/v3 snooping for multicast packet filtering
IPv6 multicast listener discovery (MLD) snooping
QoS/CoS packets prioritization support: 802.1p, DiffServ-based and re-mapping of 802.1p priority field per-port basis on four priority levels
IPv4/IPv6 QoS support
Programmable rate limiting at ingress and egress ports
Broadcast storm protection
Four priority queues with dynamic packet mapping for IEEE802.1p, IPv4 DIFFSERV, IPv6 TrafficClass
MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets
Self-address filtering for implementing ring topologies
I2C Interface to access all registers
MII management (MIIM, MDC/MDIO 2 wire) interface to access all PHY registers per IEEE 802.3 specification
In-band management to access all registers via any of the seven ports, strap enabled
I/O pin strapping facility to set certain register bits from I/O pins at reset time
This is the evaluation board for the KSZ9477S 7-Port Gigabit Ethernet Switch (also KSZ9567 and KSZ8567). The SAMA5D3 processor manages the switch and includes the ATECC508A security encoder. The DSC1101 is the reference clock for GigE communication. The EVB can be used to implement IEEE 1588v2, AVB and DLR/HSR (available on KSZ9477 only) network redundancy. Combine multiple boards to implement...
The EVB-KSZ9897 Evaluation Board supports evaluation of the KSZ9897 7-Port Gigabit Ethernet Switch in un-managed mode. The fully featured board has 5 RJ-45 sockets with the two remaining ports being connected to a KSZ9031 PHY and a LAN7801 USB to Ethernet Bridge. The board has connectivity for the MIIM PHY management bus, and also allows for in-band access to registers via the USB Bridge....
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