High-performance version of the 80C51 8-bit microcontrollers that retains all features of the 80C52 adn adds programmable counter array, 1024 bytes of XRAM, hardware watchdog timer, keyboard interface, versatile serial channel that facilitates multiprocessor communication (EUART), and a speed improvement mechanism (X2 mode).
The device has two software-selectable modes of reduced activity and an 8-bit clock prescaler to further reduce power consumption. In idle mode, the CPU is frozen while the peripherals and the interrupt system operate. In the power-down mode, the RAM is saved and all other functions are inoperative.
Development tools data is currently unavailable.
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