XIP8103H from Xiphera is a Pseudorandom Number Generator (PRNG) Intellectual Property (IP) core. It is based on Counter (CTR) operation mode of a 256-bit Advanced Encryption Standard (AES) and uses a high-speed AES-CTR implementation as an integral building block. This IP Core has been designed for easy integration with FPGA- and ASIC-based designs in a vendor-agnostic design methodology, and the functionality does not rely on any FPGA manufacturer-specific features.
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Features and Benefits
- High Performance:
- Can achieve over 13.13 Gbps throughput, while consuming only about 32738 Lookup Tables (4LUTs) in a typical Microchip® FPGA implementation.
- Up to tens of Gbps Compliant with NIST SP 800-90A CAVP validated Ready for FIPS 140-3 certification CTR_DRBG with AES-256.
- Versatility:
- Supports the forward prediction resistance mode, which can be set on and off between output generation, as well as the use of personalization strings and additional inputs for instantiation and reseeding.
- Standard Compliance:
- Fully compliant with the NIST SP800-90A specification.
- Can be combined with Xiphera’s NIST SP800-90B compliant XIP8001B to form a NIST SP800-90C compliant Random Bit Generator (RBG).
- Easy Integration :
- Pure RTL without hidden CPU or software components.
- Vendor agnostics FPGA/ASIC implementation.
Licensing Options
For additional information contact: sales@xiphera.com or visit Xiphera
Documentation
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