The RSA Signature Verification IP core very compact core designed for RSA (Rivest-Shamir-Adleman) signature verification. The IP core supports all modulus lengths up to 4096 bits, and it can also be used for RSA public key exponentiation. RSA signature verification is used in numerous contemporary security protocols and applications, including TLS 1.3. It has been designed for easy integration with FPGA- and ASIC-based designs in a vendor-agnostic design methodology, and the functionality do not rely on any FPGA manufacturer-specific features.
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Features and Benefits
- Moderate Resource Requirements:
- Requires 643 LUTs (lookup tables) and 1-2 memory blocks (Microchip® PolarFire® ) Microchip® FPGA
- Supports all NIST P curves and user-specified elliptic curves Secure architecture with side-channel protections.
- Performance:
- Despite its small size, supports more than 10 digital signature verification operations per second.
- Standard Compliance:
- Fully compliant with FIPS 186-4.
- High throughput Compliant with FIPS 186-5, SP 800-186, SP 800-56A, RFC 7748, RFC 8446, and more.
- Easy Integration :
- Pure RTL without hidden CPU or software components.
- Vendor agnostics FPGA/ASIC implementation.
Licensing Options
For additional information contact: sales@xiphera.com or visit Xiphera
Documentation
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