VESA Solutions

Arasan's VESA Display Stream Compression (DSC) IP portfolio provides standards-compliant display compression and decompression solutions for next-generation display and video systems. The portfolio includes both VESA DSC v1.2 Encoder and Decoder IP cores, enabling visually lossless compression for high-resolution display applications while reducing interface bandwidth, power consumption, memory requirements, and interconnect complexity. The IP is compliant with VESA DSC 1.2a and 1.2b specifications and supports integration into display ecosystems based on VESA Embedded DisplayPort (eDP) and MIPI DSI standards. The solution supports a wide range of RGB and YCbCr color formats, multiple bits-per-component configurations, advanced prediction algorithms, and programmable display resolutions. Optimized for low gate count, low latency, and hardware-efficient implementations, the IP can be deployed in both FPGA and ASIC designs. High-performance operation enables support for resolutions up to 8K displays while maintaining visually lossless image quality. The fully pipelined architecture facilitates efficient migration from FPGA prototypes to production ASIC implementations, making the solution suitable for high-resolution display, embedded graphics, mobile, automotive, and next-generation video applications.