Deinterlacer

The Deinterlacer IP is a real-time video processing core designed to convert interlaced video streams into progressive format using a BOB deinterlacing algorithm with line interpolation. It reconstructs full-resolution progressive frames from interlaced input fields, enabling compatibility with modern display systems and progressive video pipelines. Interlaced video consists of alternating odd and even fields that represent partial frames captured at different time instances. The Deinterlacer IP processes each field independently, interpolating missing lines to generate complete frames while preserving temporal resolution and motion smoothness. This approach eliminates common interlacing artifacts such as combing and flickering. The IP uses a memory-efficient architecture with internal line buffers and does not require external frame buffering, resulting in low latency and reduced resource utilization. It supports multiple pixel widths, color formats, and flexible interface options, making it adaptable for various video processing pipelines. With support for AXI4-Stream and native interfaces, as well as configurable control via AXI4-Lite, the Deinterlacer IP integrates seamlessly into FPGA designs. It is ideal for applications requiring real-time video enhancement, conversion, and display processing.