CORETSE_AHB

CoreTSE_AHB is a tri-speed Ethernet Media Access Controller that connects an AMBA® AHB system to an external Ethernet physical layer in embedded networking designs. It exists to add wire-speed packet handling without forcing the processor to manage every frame movement or low-level media access task. The core combines Ethernet MAC processing, local buffering, and direct memory access so packet transfers can move between system memory and the network with low software overhead. This makes it well suited for systems that need deterministic communication, efficient host offload, and a straightforward path to Ethernet connectivity inside FPGA-based SoCs and controllers. It supports both copper-style media independent signaling and serialized gigabit attachment, which helps designers target different PHY architectures with the same MAC subsystem. Integrated address filtering, management access to the PHY, pause-based flow control, and statistics collection simplify system monitoring and traffic handling. Optional wake capability and filtering features also help reduce always-on software involvement in connected systems. Engineers evaluating packet-based control, industrial networking, communications infrastructure, or embedded data acquisition designs can use this core to build a complete Ethernet endpoint around an AHB host architecture, especially where hardware-managed buffering and transfer orchestration deliver the greatest system value.

Note: CoreTSE and CoreTSE_AHB are included in the CoreTSE_AHB license.