CoreDesignShield is a security-focused IP that enables secure retrieval and management of cryptographic keys during FPGA operation. It interfaces with PF_SYSTEM_SERVICES using an APB3 initiator interface to fetch protected key data stored in secure non-volatile memory (sNVM). The core supports authenticated cipher text access, configurable key lengths, and user-defined secret keys to enhance system security. It also includes optional support for user-provided keys, enabling secure key loading during power-up.The architecture includes a reset synchronizer, user key controller, and main control logic that manages secure key retrieval and validation. Once the key is successfully fetched, the core signals completion for downstream use. CoreDesignShield is ideal for applications requiring robust security, anti-tampering measures, and protection of sensitive intellectual property within FPGA designs.
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Features and Benefits
- Secure Key Retrieval
- Fetches keys from secure non-volatile memory
- Authenticated cipher text access
- Configurable Security Parameters
- Key length configuration
- User secret key support
- User Key Support
- Optional key input at power-up
- Handshake-based interface
- APB3 Integration
- Interfaces with system services
- Embedded security workflow
Licensing Options
Free with any Libero license
Documentation
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| CoreDesignShield User Guide | Download |