Low-Skew, Low-Jitter Differential ePPS Fanout Buffer
This clock fanout buffer offers ultra-low additive jitter of just 24 fs and supports frequencies up to 1.5 GHz. Well suited for PCIe® clock trees Gen 1–5, it features eight outputs, hot-swappable capabilities and control via individual output pins or I2C interface.
Low-Skew, Low-Jitter LVCMOS ePPS Fanout Buffer
This LVCMOS clock fanout buffer offers ultra-low additive jitter of 17 fs and supports frequencies up to 200 MHz. It has ten LVCMOS outputs, which can be powered from a 3.3V, 2.5V, 1.8V or 1.5V supply. Output can be synchronously enabled/disabled via an OE pin.
SyncE Network Synchronizer
Containing dual DPLL clock channels, three DPLLs for advanced modes and five low-jitter synthesizers, its features also include ePPS, fast boot, partial reset and cascading DPLL. This product is well suited for 5G DU/CU server applications with GPS/GNSS synchronization.
ePPS TimeBuffer
This ePPS TimeBuffer features four inputs and 12 outputs, providing reliable time signal fanout with ePPS and smooth ref-sync locking. Intended for server-based 5G DU/CU applications, it can be integrated into OCP NIC or PCIe daughter cards or deployed in large telecom chassis systems.
High-Stability Crystal Oscillator
A high-performance Oven Controlled Crystal Oscillator (OCXO) in a 22 × 25 SMD hermetically sealed package, this device delivers excellent frequency stability, slope and holdover performance for 5G base stations and 1588 applications.
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