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SY100ELT25

Status: In Production

Features:

  • 2.6ns typical propagation delay
  • Differential ECL inputs
  • 24mA TTL outputs
  • Flow-through pinouts
  • Available in 8-pin SOIC package
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Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

The SY100ELT25 is a differential ECL-to-TTL translator. Because ECL levels are used, a +5V, -5.2V (or -4.5V) and ground are required. The small outline 8- lead SOIC package and the single gate of the ELT25 makes it ideal for those applications where performance, space and low power are at a premium.The VBB output allows the ELT25 to also be used in a single-ended input mode. In this mode the VBB output is tied to the D input for a non-inverting buffer or the D input for an inverting buffer. If used the VBB pin should be bypassed to ground via a 0.01µF capacitor.

Additional Features
    • 2.6ns typical propagation delay
    • Differential ECL inputs
    • 24mA TTL outputs
    • Flow-through pinouts
    • Available in 8-pin SOIC package
    Parametrics
    Name
    Value
    Product Type
    Logic Translators
    Input
    ECL
    Output
    TTL
    Supply Voltage
    5
    Max Freq (GHz)
    0.5
    Max Prop Delay (ps)
    3600
    Icc (mA)
    14
    OE
    False
    RPE
    False
    FSI
    False
    Input Mux
    False
    Input EQ
    False
    Channels
    Single
    Output Type
    TTL
    Output Voltage
    5

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    RoHS Information

    Part Number
    Device Weight (g)
    Shipping Weight (grams)
    Lead Count
    Package Type
    Package Width
    Solder Composition
    JEDEC Indicator
    RoHS
    China EFUP
    SY100ELT25ZG
    0.075000
    0.163265
    8
    SOIC
    3.90mm(.150in)
    NiPdAu
    e4
    SY100ELT25ZG-TR
    0.075000
    0.250000
    8
    SOIC
    3.90mm(.150in)
    NiPdAu
    e4
    To see a complete listing of RoHS data for this device, please Click here
    Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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