Low-power, high-performance CMOS 8-bit microcontroller with 2KB ISP flash memory. The device uses Microchip high-density nonvolatile memory technology and is compatible with the industry-standard MCS??-51 instruction set.
An enhanced CPU core can fetch a single byte from memory every clock cycle and is capable of 20-MIPS throughput. The new CPU core runs at a much lower speed, greatly reducing power consumption.
Development tools data is currently unavailable.
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