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SY89429A

Status: Not Recommended for new designs

Features:

  • Improved jitter performance over SY89429
  • 25 to 400MHz differential PECL outputs
  • ±25ps peak-to-peak output jitter
  • Minimal frequency over-shoot
  • Synthesized architecture
  • Serial 3 wire interface
  • Parallel interface for power-on
  • Internal quartz reference oscillator driven by quartz crystal or PECL source
  • PECL output can operate with either +3.3V or +5V VCC_OUT power supply
  • External loop filter optimizes performance/cost
  • Applications note (AN-06) for ease of design-ins
  • Available in PLCC and SOIC 28-pin packages
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Device Overview

Summary

NOT RECOMMENDED FOR NEW DESIGNS

The SY89429A is a general purpose, synthesized clock source targeting applications that require both serial and parallel interfaces. Its internal VCO will operate over a range of frequencies from 400 to 800MHz. The differential PECL output can be configured to be the VCO frequency divided by 2, 4, 8 or 16. With the output configured to divide the VCO frequency by 2, and with a 16MHz external quartz crystal used to provide the reference frequency, the output frequency can be specified in 1MHz steps.

Additional Features
    • Improved jitter performance over SY89429
    • 25 to 400MHz differential PECL outputs
    • ±25ps peak-to-peak output jitter
    • Minimal frequency over-shoot
    • Synthesized architecture
    • Serial 3 wire interface
    • Parallel interface for power-on
    • Internal quartz reference oscillator driven by quartz crystal or PECL source
    • PECL output can operate with either +3.3V or +5V VCC_OUT power supply
    • External loop filter optimizes performance/cost
    • Applications note (AN-06) for ease of design-ins
    • Available in PLCC and SOIC 28-pin packages
Parametrics
Name
Value
Product Type
Clock Synthesizers
Input Frequency (MHz) Crystal
25
PDB
False
OE
False
FSEL
False
CSEL
False
CLK
False
Ultra Low Power
False
Output Frequency Min. (MHz)
156.25/125

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