The META-240G is part of Microchip's family of Router PHY devices that enable high density Ethernet and OTN line cards on routers, carrier Ethernet switches and packet-optical transport equipment. By providing converged OTN and Ethernet interfaces in 24x 10G, 6x 40G or 2x 100G configurations, the META-240G delivers a single-chip solution that OEMs can use for multiple applications.

The META-240G delivers the rich set of mapping options required by carrier router and switch line cards. It supports GFP packet traffic mapping, including Ethernet and IP/MPLS into OTN, and transparent Ethernet mapping using GMP or BMP as specified in G.709. All 10G ports support mapping 10GE traffic into OTU2 in accordance with G.709/G.Sup43. Integrated 10G/40G/100G Ethernet MAC/PCS provide standards-compatible, rich performance monitoring.

Designed for leading edge carrier routing and switching solutions, the META-240G provides OEMs with industry-leading carrier Ethernet functions. In addition to 802.3ah Link OAM, the device supports packet-based timing distribution via Synchronous Ethernet and IEEE 1588v2 Precision Timing Protocol. This enables carriers to deliver the performance required for packetbased wireless backhaul infrastructure.

Variants available with OTN encryption (PM5992) and without OTN encryption (PM5993).

The META-240G family includes a hardware and software compatible lower capacity variants PM5984 & PM5985 META-120GX.

• High Capacity 24x 10G / 6x 40G / 2x 100G Converged Ethernet / OTN Framer
• Support for OTN wrapping of 10GE to OTU2/2e/1e, 40GE to OTU3 and 100GE to OTU4
• Support for flexible packet-mapping of Ethernet, IP and MPLS from Interlaken into ODUk channels
• Supports glueless interconnect to NPs and switches via Interlaken or Ethernet system interfaces
• AES-256 datapath encryption engine with flexible key management for SDN control (PM5992-only)
• Integrated IEEE 802.3 compatible physical coding sub-layer (PCS) and media access controllers (MAC) for 10GE, 40GE and 100GE
• Industry compatible ITU-T 10G, 40G and 100G FECs
• Support for IEEE 1588v2 PTP and Synchronous Ethernet timing protocols, enabling packet-based mobile backhaul and packet transport networks
• Integrated 100G Gearbox and Multi-rate SERDES support up to 28 Gbps to connect directly to SFP+, QSFP+, CFP, CFP2, CFP4 and QSFP28 optics
• Reduces bill of materials and footprint by utilizing a single external reference clock
• PCIe for microprocessor access
• Leverages common Software Development Kit across META and DIGI family code base