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PL500-15

Status: In Production

Features:

  • PL500-15: ÷8, ÷16
  • PL500-16: ÷2, ÷4
  • VCXO output for the 1MHz to 18MHz range
  • 16MHz to 36MHz fundamental crystal input
  • Low phase noise (-130 dBc @ 10kHz offset using a 35.328MHz crystal)
  • LVCMOS output with OE tri-state control
  • Integrated high linearity variable capacitors
  • 12mA drive capability at TTL output
  • ±150 ppm pull range, max 5% linearity
  • Low jitter (RMS): 2.5ps period jitter
  • 2.5V - 3.3V operation
  • Available in 8-Pin SOP, 6-pin SOT23 GREEN/ RoHS compliant packages, or Die
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Overview
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RoHS Information
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Device Overview

Summary

The PL500-15/16 is a low cost, high performance and low phase noise VCXO for the 1MHz to 18MHz range, providing less than -130dBc at 10kHz offset when using a 35.328MHz crystal.The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for applications requiring voltage controlled frequency sources. Input crystal can range from 16MHz to 36MHz (fundamental resonant mode).

Additional Features
    • VCXO with Divider Selection (DIVSEL) input pin
      • PL500-15: ÷8, ÷16
      • PL500-16: ÷2, ÷4
    • VCXO output for the 1MHz to 18MHz range
    • 16MHz to 36MHz fundamental crystal input
    • Low phase noise (-130 dBc @ 10kHz offset using a 35.328MHz crystal)
    • LVCMOS output with OE tri-state control
    • Integrated high linearity variable capacitors
    • 12mA drive capability at TTL output
    • ±150 ppm pull range, max 5% linearity
    • Low jitter (RMS): 2.5ps period jitter
    • 2.5V - 3.3V operation
    • Available in 8-Pin SOP, 6-pin SOT23 GREEN/ RoHS compliant packages, or Die
Parametrics
Name
Value
Product Type
VCXO
Linearity
<5%
# of Outputs
1
Voltage
2.5/3.3
PDB
False
OE
False
FSEL
False
CSEL
False
CLK
False
Pull Range (±PPM)
150
Output Logic
CMOS
Function
VCXO, Non-Multiplier
Ultra Low Power
False
input Frequency Min (MHz)
16
input Frequency Max (MHz)
36
Output Frequency Min. (MHz)
1
Output Frequency Max. (MHz)
4

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