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AT40K40

Status: In Production

Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

This 40,000 to 50,000-gate coprocessor is a fully PCI-compliant, SRAM-based FPGA with distributed 10-ns programmable synchronous/asynchronous, dual-port/single-port SRAM, 8 global clocks, Cache Logic® ability (partially or fully reconfigurable without loss of data), and automatic component generators. It has a 384 I/O count and supports a 5-V design. It can be used as a coprocessor for high-speed (DSP/processor-based) designs by implementing a variety of computation intensive, arithmetic functions. It is designed to quickly implement high-performance, large gate count designs through the use of synthesis and schematic-based tools used on a PC or Sun platform.

Parametrics
Name
Value
Max# Operating Freq# (MHz)
100
Speed
-2
Max I/O Pins
384
F#max (MHz)
100
Operating Voltage Max (V)
5.5
Registers
2304
Memory
18432
Usable Gates Range (K)
40 to 50
Operating Voltage Min (V)
4.5

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (grams)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
AT40K40AL-1DQU
5.849700
4.166667
208
PQFP
28x28x3.4mm
Matte Tin
e3
AT40K40AL-1BQU
1.392800
7.833333
144
LQFP
20x20x1.4mm
Matte Tin
e3
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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