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RISC-V® Innovation Unleashed

Join the PolarFire® SoC FPGA Revolution

Learn how to get started with the PolarFire SoC FPGA, the world’s first RISC-V based SoC FPGA, to create fully deterministic, real-time systems alongside the Linux® operating system.

Join our experts and partners as we provide a series of webinars to introduce you to the Icicle Development Kit. This kit, which is available now, is the first development platform for PolarFire SoC FPGAs and is supported by Libero® SoC Design Suite and SoftConsole software development environments. You will see demo applications and learn how to create projects, generate designs and set up and configure your own systems targeting our new SoC FPGA.

Use the "Join Our Mailing List" link to receive email notifications about upcoming webinars and to subscribe to our newsletter.

Upcoming Webinars

Webinar #1: Introduction to the PolarFire® SoC Icicle Kit

Date: Thursday, October 8, 2020
Time: 8:00
–8:30 a.m. PDT

Did you just get your hands on an Icicle Development Kit, and are you ready to find out what it can do? During this webinar, you’ll learn how to boot the Linux® OS out of the box and run a web server on the kit to monitor power usage. You’ll also be shown how to program the eNVM™ to run a bare metal application on boot and restore the kit to the factory image to boot Linux once again.

Webinar #2: PolarFire® SoC Software Development Flow

Date: Thursday, November 12, 2020
Time: 8:00
–8:30 a.m. PST

During this webinar, we will demonstrate the software flow for using PolarFire SoC FPGAs. We will configure the Microcontroller Subsystem (MSS) using the MSS configurator, show you how to import the generated MSS component into a Libero® SoC Design Suite project and demonstrate how to integrate the generated MSS configuration XML into the embedded software flow. You will also learn how to enable the fabric interfaces on the MSS to start taking advantage of the PolarFire FPGA fabric.

Webinar #3: Booting PolarFire® SoC FPGAs

Date: Thursday, December 10, 2020
Time: 8:00
–8:30 a.m. PST

In this session, we'll show you how your FPGA comes to life when you turn on the power. We’ll walk you through starting up the system controller, booting the Microcontroller Subsystem (MSS) cores, configuring the system to the Zero Stage Boot Loader (ZSBL), copying your bare metal or Linux® image into memory and starting up.