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SPI framed master

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keith1200rs
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2009/06/09 01:27:04 (permalink)
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SPI framed master

I am driving an SPI DAC which requires a CS which goes low before the SPI data and high after it.  I am driving it "manually" i.e with my own code driving an I/O pin.  I had expected the framed master mode to do this, but it seems to only produce a short CS pulse, not a long one, even though in framed slave mode it wants a long CS, not a short one!  Am I correct in thinking that the only way to generate the CS is by driving an I/O pin with my own code, which is what I am doing?  Ideally it would be automatic so I don't have to monitor the SPI buffer and put the CS high at the end of transmission.

Thanks.

Keith.
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    sequoia
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    RE: SPI framed master 2009/06/09 02:55:37 (permalink)
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    Here is a good SPI tutorial that covers framed SPI:
    http://dkc1.digikey.com/us/en/tod/Microchip/dsPIC30F_SerialCommSPI_NoAudio/Serial_Communications_using_the_dsPIC30F_SPI_noaudio.swf

    I believe framed is always initiated with a short pulse. At least some PICs appear to support this option in slave mode but I have never tried it. What you need is a Chip Select, CS. It can only be generated manually as you suggest.
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    keith1200rs
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    RE: SPI framed master 2009/06/09 04:50:59 (permalink)
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    Thanks.  I have read quite a bit on the SPI (although I hadn't seen that tutorial) and my software works, it is just that I was puzzled that two PIC24s, one in framed master mode and the other in framed slave mode would require different frame sync pulses!  I hoped there was a sneaky trick to make the frame sync pulse encompass the data, which is what is required by most peripherals (and the PIC24 in framed slave mode).  My application is speed critical and waiting for the SPI buffer to be full and manually setting the CS takes time.

    Keith.


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    Antipodean
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    RE: SPI framed master 2009/06/09 14:09:42 (permalink)
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    ORIGINAL: keith1200rs

    Thanks.  I have read quite a bit on the SPI (although I hadn't seen that tutorial) and my software works, it is just that I was puzzled that two PIC24s, one in framed master mode and the other in framed slave mode would require different frame sync pulses!  I hoped there was a sneaky trick to make the frame sync pulse encompass the data, which is what is required by most peripherals (and the PIC24 in framed slave mode).  My application is speed critical and waiting for the SPI buffer to be full and manually setting the CS takes time.

    Keith.

     
    I am puzzled by it too - I am wanting to use the framed mode in a similar manner to you, to interface with another peice of equipment that works in a similar manner to the PIC24 slave receive mode. I have ended up using some external jellybean 74HC chips to get the transmitter side to produce the same pulse for transmitter frame pulse.
     
    Would be nice if there was an alternate framed transmit mode that matched the receive mode exactly.

    Do not use my alias in your message body when replying, your message will disappear ...

    Alan
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    frankcf1
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    RE: SPI framed master 2009/06/10 05:29:51 (permalink)
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    Can you set the PIC to interrupt at end of transmission and set CS high in the interrupt routine?
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    keith1200rs
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    RE: SPI framed master 2009/06/10 05:34:01 (permalink)
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    ORIGINAL: frankcf1

    Can you set the PIC to interrupt at end of transmission and set CS high in the interrupt routine?


    I'm not sure, but it sounds likely.  I will look into it - thanks for the suggestion.

    Keith.
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