RE: How to add sfrs for dsPIC33FJ256GP710 adc channels?
I have to believe you're mistaken as the Microchip pdf document 70210A states:
"The ADC module contains a 16-word dual port RAM, to buffer the ADC results. The 16 buffer locations are referred to as ADC1BUF0, ADC1BUF1, ADC1BUF2, ...., ADC1BUFE, ADC1BUFF." and also that "As conversions are completed, the ADC module writes the results of the conversions into the analog-to-digital result buffer. The ADC result buffer is an array of sixteen words, accessed through the SFR space. The user application may attempt to read each analog-to-digital conversion result as it is generated. However, this might consume too much CPU time. Generally, to simplify the code, the module fills the buffer with results and generates an interrupt when the buffer is filled. The ADC module supports 16 result buffers. Therefore, the maximum number of conversions per interrupt must not exceed 16." and also "28.5.1 Buffer Fill Mode: When the Buffer Fill mode (BUFM<1>) bit in the ADC Control register (AD1CON2<1>) is '1', the 16-word results buffer is split into two 8-word groups: a lower group (ADC1BUF0 through ADC1BUF7) and an upper group (ADC1BUF8 through ADC1BUFF). The 8-word buffers alternately receive the conversion results after each ADC interrupt event. When the BUFM bit is set, each buffer size is equal to eight. Therefore, the maximum number of conversions per interrupt must not exceed eight."
I believe that aschen0866 is correct in saying that the linker file needs to be updated with the SFR addresses for the different ADC buffer locations.
Sorry I didn't include the above information about the 16 SFR's from 70210A.pdf in my original post.