RE: Can excessive use of DMA clog up the data bus?
I need to exchange 32 bytes between two PIC32 units, as often as I can. My plan is to hook up input and output DMA modules with the SPI port in each of the two ucs. However, there is also a timer (T3) that interrupts every 500us, and reads from the A/D and executes code, all within 20us. This occurs on both ucs, although not necessarily at the same time. Will DMA activity slow down reads from ADC1BUF*?
In any case, let's say I want to freeze all SPI/DMA activity for the duration of my T3 interrupt. I could write a '1' to DMACON.SUSPEND at the beginning of my ISR, and a '0' at the end. Since DMA activity would halt (albeit temporarily), how would this affect the integrity of the SPI transmission? Could the bytes of the communication payload become somehow "shifted"?