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Hot!PIC32mz configuration bits

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omkar09ee5018
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2017/05/03 18:59:50 (permalink)
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PIC32mz configuration bits

I use the configuration bits window to generate code and to be sure I used the MHC to make sure my initializations were correct, but after the build successful message I get :
Configuration Bits: address 0x1FC0FFC4: FPLLRNG = 7 does not match any valid value in the device database.
Setting to the default value.
Configuration Bits: address 0x1FC0FFC8: DMTCNT = 31 does not match any valid value in the device database.
Setting to the default value.

 
The code generated is:

// PIC32MZ1024ECM100 Configuration Bit Settings

// 'C' source line config statements

// DEVCFG3
// USERID = No Setting
#pragma config FMIIEN = ON // Ethernet RMII/MII Enable (MII Enabled)
#pragma config FETHIO = ON // Ethernet I/O Pin Select (Default Ethernet I/O)
#pragma config PGL1WAY = ON // Permission Group Lock One Way Configuration (Allow only one reconfiguration)
#pragma config PMDL1WAY = ON // Peripheral Module Disable Configuration (Allow only one reconfiguration)
#pragma config IOL1WAY = ON // Peripheral Pin Select Configuration (Allow only one reconfiguration)
#pragma config FUSBIDIO = ON // USB USBID Selection (Controlled by the USB Module)

// DEVCFG2
#pragma config FPLLIDIV = DIV_1 // System PLL Input Divider (1x Divider)
#pragma config FPLLRNG = RANGE_5_10_MHZ // System PLL Input Range (5-10 MHz Input)
#pragma config FPLLICLK = PLL_FRC // System PLL Input Clock Selection (FRC is input to the System PLL)
#pragma config FPLLMULT = MUL_50 // System PLL Multiplier (PLL Multiply by 50)
#pragma config FPLLODIV = DIV_4 // System PLL Output Clock Divider (4x Divider)
#pragma config UPLLFSEL = FREQ_24MHZ // USB PLL Input Frequency Selection (USB PLL input is 24 MHz)
#pragma config UPLLEN = ON // USB PLL Enable (USB PLL is enabled)

// DEVCFG1
#pragma config FNOSC = SPLL // Oscillator Selection Bits (System PLL)
#pragma config DMTINTV = WIN_127_128 // DMT Count Window Interval (Window/Interval value is 127/128 counter value)
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (Disable SOSC)
#pragma config IESO = OFF // Internal/External Switch Over (Disabled)
#pragma config POSCMOD = OFF // Primary Oscillator Configuration (Primary osc disabled)
#pragma config OSCIOFNC = OFF // CLKO Output Signal Active on the OSCO Pin (Disabled)
#pragma config FCKSM = CSECME // Clock Switching and Monitor Selection (Clock Switch Enabled, FSCM Enabled)
#pragma config WDTPS = PS1048576 // Watchdog Timer Postscaler (1:1048576)
#pragma config WDTSPGM = STOP // Watchdog Timer Stop During Flash Programming (WDT stops during Flash programming)
#pragma config WINDIS = NORMAL // Watchdog Timer Window Mode (Watchdog Timer is in non-Window mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled)
#pragma config FWDTWINSZ = WINSZ_25 // Watchdog Timer Window Size (Window size is 25%)
#pragma config DMTCNT = DMT31 // Deadman Timer Count Selection (2^31 (2147483648))
#pragma config FDMTEN = OFF // Deadman Timer Enable (Deadman Timer is disabled)

// DEVCFG0
#pragma config DEBUG = OFF // Background Debugger Enable (Debugger is disabled)
#pragma config JTAGEN = OFF // JTAG Enable (JTAG Disabled)
#pragma config ICESEL = ICS_PGx1 // ICE/ICD Comm Channel Select (Communicate on PGEC1/PGED1)
#pragma config TRCEN = ON // Trace Enable (Trace features in the CPU are enabled)
#pragma config BOOTISA = MIPS32 // Boot ISA Selection (Boot code and Exception code is MIPS32)
#pragma config FECCCON = OFF_UNLOCKED // Dynamic Flash ECC Configuration (ECC and Dynamic ECC are disabled (ECCCON bits are writable))
#pragma config FSLEEP = OFF // Flash Sleep Mode (Flash is powered down when the device is in Sleep mode)
#pragma config DBGPER = PG_ALL // Debug Mode CPU Access Permission (Allow CPU access to all permission regions)
#pragma config EJTAGBEN = NORMAL // EJTAG Boot (Normal EJTAG functionality)

// DEVCP0
#pragma config CP = OFF // Code Protect (Protection Disabled)

// SEQ0

// DEVADC1

// DEVADC2

// DEVADC3

// DEVADC4

// DEVADC5

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

#include <xc.h>


 
Why are the bits been set to default when the same config seems to work with MHC?
 
Thanks,
Omkar J.
#1

8 Replies Related Threads

    annapolis
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    Re: PIC32mz configuration bits 2017/05/03 19:18:09 (permalink)
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    What MPLABX and XC32 version ?
    #2
    omkar09ee5018
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    Re: PIC32mz configuration bits 2017/05/03 19:21:16 (permalink)
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    MPLABX version:  3.55
    xc32 version: 1.43 
    #3
    qhb
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    Re: PIC32mz configuration bits 2017/05/03 19:43:59 (permalink)
    3 (1)
    Has something redefined DMT31 ?
    The error implies the value is 31, when it should be 0b10111 = 23
     
    also, FPLLRNG=7 looks wrong. 5-10MHz should be 0b001 = 1
     
     
    #4
    omkar09ee5018
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    Re: PIC32mz configuration bits 2017/05/03 20:06:51 (permalink)
    3.5 (2)
    I agree, thats why the concern. 
    I just copied the code from the generated output to the to the .h file.
    If it dosent work ill just copy the #pragmas generated by the MHC code and work with them (assuming they work).
    UPDATE: Did the same, seems to work now. :)
    God bless, uChip.
    post edited by omkar09ee5018 - 2017/05/03 20:14:12
    #5
    W.Lang
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    Re: PIC32mz configuration bits 2017/05/04 04:35:26 (permalink)
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    I know the config statements should precede the project .h files but shouldn't they come AFTER xc.h.
     
    -Bill
    #6
    Jim Nickerson
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    Re: PIC32mz configuration bits 2017/05/04 07:46:20 (permalink)
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    W.Lang,
    The last 3 lines of the generated config bits say no.
    #7
    ecdhe
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    Re: PIC32mz configuration bits 2019/01/25 06:45:11 (permalink)
    0
     
    Configuration Bits: address 0x1FC0FFC4: FPLLRNG = 7 does not match any valid value in the device database.
    Setting to the default value.
    Configuration Bits: address 0x1FC0FFC8: DMTCNT = 31 does not match any valid value in the device database.
    Setting to the default value.

     
    These warnings can also occur when your code is being build to be loaded by a boot loader.
     
    Normally, when building an application as a standalone image, MPLABX will produce a PIC32 compiled application image that contains data in the boot flash, the configuration registers, and the program flash.  However, in the Microchip bootloader examples, the applications linker file has been modified to support a bootloader by omitting the configuration registers.  The linker file syntax for this is:
     
    /DISCARD/ : { *(.config_*) }

     
    When the linker does not write values to a location, the default value is understood to be 0xFF, the same value as uninitialized/erased flash.  So when an MPLABX project is built in a bootloader configuration, the linker produces an output that appears to have 0xFFs in the configuration registers.  Since 0xFF has a binary representation of b11111111, this causes the FPLLRNG value, which consists of three bits, to appear to have a value of b111, or decimal 7.  Since DMTCNT consists of five bits, it appears to have a value of b11111, or decimal 31.
     
    Since DMTCNT = 31 and FPLLRNG = 7 are invalid values on a pic32mz part, the IDE complains, even though the reality is that they're not going to be written at all. 
     
    So if you're building an application image to be started by a bootloader that has already programmed the configuration flash registers to their desired values, these warnings can be safely ignored.
     
    post edited by ecdhe - 2019/01/25 06:48:07
    #8
    sergeydub
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    Re: PIC32mz configuration bits 2019/09/18 16:12:54 (permalink)
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    Thanks for good explanation ecdhe.   I noticed that warnings go away if I add bootloader.hex as "Loadables".
    #9
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