• AVR Freaks

[Easy Question] SPI configuration with PPS not working [Solved]

Page: 12 > Showing page 1 of 2
Author
pedro.duarte
Starting Member
  • Total Posts : 73
  • Reward points : 0
  • Joined: 2007/03/26 15:30:25
  • Location: 0
  • Status: offline
2017/01/10 11:24:22 (permalink)
3 (1)

[Easy Question] SPI configuration with PPS not working [Solved]

I understand that this is a very basic question.. I must be doing something really stupid to not making this work but I honestly have searched the web and can't find a solution..
 
I just started programming with XC8 on a PIC18F24K40 and I just want to send a simple byte via SPI to another node. I didn't find SPI libraries for XC8 so I coded my SPI configuration and write functions.
 
The problem is that:
 - no signal is apparently being sent thru the PINs that I configured (neither SDO nor CLK show on oscilloscope)
 - The BF flag goes HIGH and the code moves on... Which is weird because my PIC is not connected to the SPI bus yet...So how is the Buffer Full flag being set?
 
The PIC is working and I can see on the oscilloscope the Chip Select pin changing (I am using it as trigger to try to view the SDO and CLK signals) but nothing on the other pins.. 
 
Can you please give it a look and help me out? Thanks in advance!
 
My code:

#include <xc.h>
#include <pic18f24k40.h>
 
#define SPI_CS LATBbits.LATB2
 
void SPI_config() {
    //set data direction for ports in SPI communication
    //RB5=Data In (I); RB4=Data Out (O); RB3=SPI clock (O); RB2=Chip Select (O))
    TRISBbits.TRISB2 = 0; //Output
    TRISBbits.TRISB3 = 0; //Output
    TRISBbits.TRISB4 = 0; //Output
    TRISBbits.TRISB5 = 1; //Input
    
    //set logical Functions
    RB3PPS = 0b1111; //clock for SPI on RB3
    RB4PPS = 0; //DATAOUT for SPI on RB4
    SSP1DATPPSbits.SSP1DATPPS = 0b1101; // set SPI data input to RB5
    
    //set SPI protocol settings
    SSP1STATbits.SMP = 0; //Input data is sampled at the middle of data output time
    SSP1STATbits.CKE = 1; //Transmit occurs on the transition from active to Idle clock state
    SSP1CON1bits.CKP = 1; //Idle state for the clock is a high level
    SSP1CON1bits.SSPM = 1; //SPI Master mode: Clock = FOSC/16 = 1MHz
    
    //activate SPI Module
    SSP1CON3bits.PCIE = 0; //Stop detection interrupts are disabled
    SSP1CON3bits.SCIE = 0; //Start detection interrupts are disabled
    SPI_CS = 1;
    SSP1CON1bits.SSPEN = 1;
}

void SPI_writebByte(char data) {
    SSP1BUF = data;
    while( !SSP1STATbits.BF ); // wait until 'BF' bit is set
}
 
void main(void) {
   //config clock
   OSCFRQbits.HFFRQ = 5; //16MHZ; fosc/4 = 4MHz
 
   //config SPI
   SPI_config();
 
   while(1) {
      SPI_CS = 0;
      SPI_writebByte(0x55);
      SPI_CS = 1;
   }
}

post edited by pedro.duarte - 2017/01/11 07:52:25
#1

20 Replies Related Threads

    qhb
    Superb Member
    • Total Posts : 9999
    • Reward points : 0
    • Joined: 2016/06/05 14:55:32
    • Location: One step ahead...
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 12:18:06 (permalink)
    +2 (2)
    #include <pic18f24k40.h>

    Don't do this.
    xc.h has already included it for you, so you're doing it a second time.
     
    The BF bit indicates that the input buffer is full, not the output buffer.
    You need to add some dummy reads of SSPBUF to clear it.
    Just change
    void SPI_writebByte(char data) {
        SSP1BUF = data;
        while( !SSP1STATbits.BF ); // wait until 'BF' bit is set
    }

    to
    void SPI_writebByte(char data) {
     
        SSP1BUF;    // dummy read to clear BF flag
        SSP1BUF = data;    //send data
        while( !SSP1STATbits.BF ); // wait until 'BF' bit is set
    }

     
    You did not show your config bit settings. Please do!
     
    #2
    pedro.duarte
    Starting Member
    • Total Posts : 73
    • Reward points : 0
    • Joined: 2007/03/26 15:30:25
    • Location: 0
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 13:01:30 (permalink)
    0
    Thx for you reply. Changed the function to the one you gave me but still no signal on the output pins.
    Complete code:
     

    // CONFIG1L// CONFIG1L
    #pragma config FEXTOSC = OFF // External Oscillator mode Selection bits (Oscillator not enabled)
    #pragma config RSTOSC = HFINTOSC_64MHZ// Power-up default value for COSC bits (HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1)
    // CONFIG1H
    #pragma config CLKOUTEN = ON // Clock Out Enable bit (CLKOUT function is enabled)
    #pragma config CSWEN = ON // Clock Switch Enable bit (The NOSC and NDIV bits cannot be changed by user software)
    #pragma config FCMEN = ON // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)
    // CONFIG2L
    #pragma config MCLRE = EXTMCLR // Master Clear Enable bit (If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR )
    #pragma config PWRTE = OFF // Power-up Timer Enable bit (Power up timer disabled)
    #pragma config LPBOREN = OFF // Low-power BOR enable bit (ULPBOR disabled)
    #pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled , SBOREN bit is ignored)
    // CONFIG2H
    #pragma config BORV = VBOR_2P45 // Brown Out Reset Voltage selection bits (Brown-out Reset Voltage (VBOR) set to 2.45V)
    #pragma config ZCD = OFF // ZCD Disable bit (ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON)
    #pragma config PPS1WAY = ON // PPSLOCK bit One-Way Set Enable bit (PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle)
    #pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
    #pragma config DEBUG = OFF // Debugger Enable bit (Background debugger disabled)
    #pragma config XINST = OFF // Extended Instruction Set Enable bit (Extended Instruction Set and Indexed Addressing Mode disabled)
    // CONFIG3L
    #pragma config WDTCPS = WDTCPS_31// WDT Period Select bits (Divider ratio 1:65536; software control of WDTPS)
    #pragma config WDTE = OFF // WDT operating mode (WDT enabled regardless of sleep)
    // CONFIG3H
    #pragma config WDTCWS = WDTCWS_7// WDT Window Select bits (window always open (100%); software control; keyed access not required)
    #pragma config WDTCCS = SC // WDT input clock selector (Software Control)
    // CONFIG4L
    #pragma config WRT0 = OFF // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
    #pragma config WRT1 = OFF // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
    // CONFIG4H
    #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-30000Bh) not write-protected)
    #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
    #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
    #pragma config SCANE = ON // Scanner Enable bit (Scanner module is available for use, SCANMD bit can control the module)
    #pragma config LVP = OFF // Low Voltage Programming Enable bit (HV on MCLR/VPP must be used for programming)
    // CONFIG5L
    #pragma config CP = OFF // UserNVM Program Memory Code Protection bit (UserNVM code protection disabled)
    #pragma config CPD = OFF // DataNVM Memory Code Protection bit (DataNVM code protection disabled)
    // CONFIG5H
    // CONFIG6L
    #pragma config EBTR0 = OFF // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
    #pragma config EBTR1 = OFF // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
    // CONFIG6H
    #pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
    #include <xc.h>
    #define SPI_CS LATBbits.LATB2
    void SPI_config() {
    //set data direction for ports in SPI communication
    //RB5=Data In (I); RB4=Data Out (O); RB3=SPI clock (O); RB2=Chip Select (O))
    TRISBbits.TRISB2 = 0; //Output
    TRISBbits.TRISB3 = 0; //Output
    TRISBbits.TRISB4 = 0; //Output
    TRISBbits.TRISB5 = 1; //Input

    //set logical Functions
    RB3PPS = 0b1111; //clock for SPI on RB3
    RB4PPS = 0; //DATAOUT for SPI on RB4
    SSP1DATPPSbits.SSP1DATPPS = 0b1101; // set SPI data input to RB5

    //set SPI protocol settings
    SSP1STATbits.SMP = 0; //Input data is sampled at the middle of data output time
    SSP1STATbits.CKE = 1; //Transmit occurs on the transition from active to Idle clock state
    SSP1CON1bits.CKP = 1; //Idle state for the clock is a high level
    SSP1CON1bits.SSPM = 1; //SPI Master mode: Clock = FOSC/16 = 4MHz

    //activate SPI Module
    SSP1CON3bits.PCIE = 0; //Stop detection interrupts are disabled
    SSP1CON3bits.SCIE = 0; //Start detection interrupts are disabled
    SPI_CS = 1;
    SSP1CON1bits.SSPEN = 1;
    }
    void SPI_writebByte(char data) {
    SSP1BUF; // dummy read to clear BF flag
    SSP1BUF = data; //send data
    while( !SSP1STATbits.BF ); // wait until 'BF' bit is set
    }
    void main(void) {
    //config clock
    OSCFRQbits.HFFRQ = 5; //16MHZ; fosc/4 = 4MHz
    //OSCFRQbits.HFFRQ = 8; //64MHZ; fosc/4 = 16MHz (maximum for this PIC and the minimum freq needed for 8 TQ in 1Mbps CANBUS)
    //config SPI
    SPI_config();

    while(1) {
    SPI_CS = 0;
    SPI_writebByte(0x55);
    SPI_CS = 1;
    }
    }

    #3
    DavidBLit
    Super Member
    • Total Posts : 1579
    • Reward points : 0
    • Joined: 2012/02/18 13:08:48
    • Location: The Land of Confusion
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 13:19:19 (permalink)
    +1 (1)

    #pragma config PPS1WAY = ON // PPSLOCK bit One-Way Set Enable bit (PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle)

    Try "OFF".

    Yeah, "//Code and stuff".
    #4
    qhb
    Superb Member
    • Total Posts : 9999
    • Reward points : 0
    • Joined: 2016/06/05 14:55:32
    • Location: One step ahead...
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 13:55:30 (permalink)
    +2 (2)
    Youi missed a bit in the PPS output selection
     RB4PPS = 0; //DATAOUT for SPI on RB4
    should be
     RB4PPS = 0b10000; //DATAOUT for SPI on RB4
    #5
    CinziaG
    die fucking humans
    • Total Posts : 3145
    • Reward points : 0
    • Joined: 2016/12/07 14:20:36
    • Location: Wien
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 14:11:18 (permalink)
    +1 (1)
    Good catch Smile
    I always and still prefer PPS.H macros where available...

    in 2018 you signed for your annihilation. in 2019 it will come ;) I promise
    my most wonderful creations here
    https://www.youtube.com/c...dPFRvtwsbSTXp6Sk6azGOQ
    #6
    pedro.duarte
    Starting Member
    • Total Posts : 73
    • Reward points : 0
    • Joined: 2007/03/26 15:30:25
    • Location: 0
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 15:46:31 (permalink)
    0
    Thanks for all the replies. still no luck :/ Indeed there was an error on the SDO pin but after fixing it I still dont have any signal output..
     
    Do you guys mind trying this code to see if you can get a pulse on RB3 (CLK) or RB4 (SDO)?
    Or have any other ideas?
     

    // CONFIG1L// CONFIG1L
    #pragma config FEXTOSC = OFF // External Oscillator mode Selection bits (Oscillator not enabled)
    #pragma config RSTOSC = HFINTOSC_64MHZ// Power-up default value for COSC bits (HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1)
    // CONFIG1H
    #pragma config CLKOUTEN = ON // Clock Out Enable bit (CLKOUT function is enabled)
    #pragma config CSWEN = ON // Clock Switch Enable bit (The NOSC and NDIV bits cannot be changed by user software)
    #pragma config FCMEN = ON // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)
    // CONFIG2L
    #pragma config MCLRE = EXTMCLR // Master Clear Enable bit (If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR )
    #pragma config PWRTE = OFF // Power-up Timer Enable bit (Power up timer disabled)
    #pragma config LPBOREN = OFF // Low-power BOR enable bit (ULPBOR disabled)
    #pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled , SBOREN bit is ignored)
    // CONFIG2H
    #pragma config BORV = VBOR_2P45 // Brown Out Reset Voltage selection bits (Brown-out Reset Voltage (VBOR) set to 2.45V)
    #pragma config ZCD = OFF // ZCD Disable bit (ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON)
    #pragma config PPS1WAY = OFF // PPSLOCK bit One-Way Set Enable bit (PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle)
    #pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
    #pragma config DEBUG = OFF // Debugger Enable bit (Background debugger disabled)
    #pragma config XINST = OFF // Extended Instruction Set Enable bit (Extended Instruction Set and Indexed Addressing Mode disabled)
    // CONFIG3L
    #pragma config WDTCPS = WDTCPS_31// WDT Period Select bits (Divider ratio 1:65536; software control of WDTPS)
    #pragma config WDTE = OFF // WDT operating mode (WDT enabled regardless of sleep)
    // CONFIG3H
    #pragma config WDTCWS = WDTCWS_7// WDT Window Select bits (window always open (100%); software control; keyed access not required)
    #pragma config WDTCCS = SC // WDT input clock selector (Software Control)
    // CONFIG4L
    #pragma config WRT0 = OFF // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
    #pragma config WRT1 = OFF // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
    // CONFIG4H
    #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-30000Bh) not write-protected)
    #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
    #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
    #pragma config SCANE = ON // Scanner Enable bit (Scanner module is available for use, SCANMD bit can control the module)
    #pragma config LVP = OFF // Low Voltage Programming Enable bit (HV on MCLR/VPP must be used for programming)
    // CONFIG5L
    #pragma config CP = OFF // UserNVM Program Memory Code Protection bit (UserNVM code protection disabled)
    #pragma config CPD = OFF // DataNVM Memory Code Protection bit (DataNVM code protection disabled)
    // CONFIG5H
    // CONFIG6L
    #pragma config EBTR0 = OFF // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
    #pragma config EBTR1 = OFF // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
    // CONFIG6H
    #pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
    #include <xc.h>
    void SPI_config() {
    //set data direction for ports in SPI communication
    //RB5=Data In (I); RB4=Data Out (O); RB3=SPI clock (O); RB2=Chip Select (O))
    TRISBbits.TRISB2 = 0; //Output
    TRISBbits.TRISB3 = 0; //Output
    TRISBbits.TRISB4 = 0; //Output
    TRISBbits.TRISB5 = 1; //Input

    //set logical Functions
    RB3PPS = 0b01111; //clock for SPI on RB3
    RB4PPS = 0b10000; //DATAOUT for SPI on RB4
    SSP1DATPPSbits.SSP1DATPPS = 0b1101; // set SPI data input to RB5

    //set SPI protocol settings
    SSP1STATbits.SMP = 0; //Input data is sampled at the middle of data output time
    SSP1STATbits.CKE = 1; //Transmit occurs on the transition from active to Idle clock state
    SSP1CON1bits.CKP = 1; //Idle state for the clock is a high level
    SSP1CON1bits.SSPM = 1; //SPI Master mode: Clock = FOSC/16 = 4MHz

    //activate SPI Module
    SSP1CON3bits.PCIE = 0; //Stop detection interrupts are disabled
    SSP1CON3bits.SCIE = 0; //Start detection interrupts are disabled
    LATBbits.LATB2 = 1;
    SSP1CON1bits.SSPEN = 1;
    }
    void SPI_writebByte(char data) {
    SSP1BUF; // dummy read to clear BF flag
    SSP1BUF = data; //send data
    while( !SSP1STATbits.BF ); // wait until 'BF' bit is set
    }
    void main(void) {
    OSCFRQbits.HFFRQ = 5; //16MHZ; fosc/4 = 4MHz
    SPI_config();

    while(1) {
    LATBbits.LATB2 = 0;
    SPI_writebByte(0x55);
    LATBbits.LATB2 = 1;
    }
    }

     
    #7
    CinziaG
    die fucking humans
    • Total Posts : 3145
    • Reward points : 0
    • Joined: 2016/12/07 14:20:36
    • Location: Wien
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 15:51:50 (permalink)
    0
    I'd add a little delay after
     LATBbits.LATB2 = 1;
    i.e. end of iteration.

    I can't test the code...

    in 2018 you signed for your annihilation. in 2019 it will come ;) I promise
    my most wonderful creations here
    https://www.youtube.com/c...dPFRvtwsbSTXp6Sk6azGOQ
    #8
    qhb
    Superb Member
    • Total Posts : 9999
    • Reward points : 0
    • Joined: 2016/06/05 14:55:32
    • Location: One step ahead...
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 15:54:13 (permalink)
    +1 (1)
    I haven't spotted it in the datasheet, but some other PICs with PPS require you to map the SPI clock pin as both an input and an output.
    It's worth a try.
     
    #9
    pedro.duarte
    Starting Member
    • Total Posts : 73
    • Reward points : 0
    • Joined: 2007/03/26 15:30:25
    • Location: 0
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 16:12:23 (permalink)
    +1 (1)
    Thx Cinzia, dont think that is a problem since I have a breakpoint on the begining of next iteration (so it only does one iteration each time I probe it)
     
    Thx QHB, tried it but still didnt work. Added the code:
    //set logical Functions
    RB3PPS = 0b01111; //clock for SPI on RB3 (as output))
    SSP1CLKPPSbits.SSP1CLKPPS = 0b01011; //clock for SPI on RB3 (as input)

     
    I'm starting to think that this is not a easy problem after all... :/
    #10
    CinziaG
    die fucking humans
    • Total Posts : 3145
    • Reward points : 0
    • Joined: 2016/12/07 14:20:36
    • Location: Wien
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 16:15:12 (permalink)
    +1 (1)
    Indeed Smile page 332, 26.5.1, note bottom right!

    in 2018 you signed for your annihilation. in 2019 it will come ;) I promise
    my most wonderful creations here
    https://www.youtube.com/c...dPFRvtwsbSTXp6Sk6azGOQ
    #11
    pedro.duarte
    Starting Member
    • Total Posts : 73
    • Reward points : 0
    • Joined: 2007/03/26 15:30:25
    • Location: 0
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 17:01:01 (permalink)
    +1 (1)
    Still doesnt work.
    Was checking if it could be the PPS locked so that my PPS pin selection was being ignored but according to the PPSLOCK register the PPS mechanism is not locked...
     
    I am totally lost now... how hard can it be to send a simples byte via SPI?
    My final code so far:

     
    // CONFIG1L// CONFIG1L
    #pragma config FEXTOSC = OFF // External Oscillator mode Selection bits (Oscillator not enabled)
    #pragma config RSTOSC = HFINTOSC_64MHZ// Power-up default value for COSC bits (HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1)
     
    // CONFIG1H
    #pragma config CLKOUTEN = ON // Clock Out Enable bit (CLKOUT function is enabled)
    #pragma config CSWEN = ON // Clock Switch Enable bit (The NOSC and NDIV bits cannot be changed by user software)
    #pragma config FCMEN = ON // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)
     
    // CONFIG2L
    #pragma config MCLRE = EXTMCLR // Master Clear Enable bit (If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR )
    #pragma config PWRTE = OFF // Power-up Timer Enable bit (Power up timer disabled)
    #pragma config LPBOREN = OFF // Low-power BOR enable bit (ULPBOR disabled)
    #pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled , SBOREN bit is ignored)
     
    // CONFIG2H
    #pragma config BORV = VBOR_2P45 // Brown Out Reset Voltage selection bits (Brown-out Reset Voltage (VBOR) set to 2.45V)
    #pragma config ZCD = OFF // ZCD Disable bit (ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON)
    #pragma config PPS1WAY = OFF // PPSLOCK bit One-Way Set Enable bit (PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle)
    #pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
    #pragma config DEBUG = OFF // Debugger Enable bit (Background debugger disabled)
    #pragma config XINST = OFF // Extended Instruction Set Enable bit (Extended Instruction Set and Indexed Addressing Mode disabled)
     
    // CONFIG3L
    #pragma config WDTCPS = WDTCPS_31// WDT Period Select bits (Divider ratio 1:65536; software control of WDTPS)
    #pragma config WDTE = OFF // WDT operating mode (WDT enabled regardless of sleep)
     
    // CONFIG3H
    #pragma config WDTCWS = WDTCWS_7// WDT Window Select bits (window always open (100%); software control; keyed access not required)
    #pragma config WDTCCS = SC // WDT input clock selector (Software Control)
     
    // CONFIG4L
    #pragma config WRT0 = OFF // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
    #pragma config WRT1 = OFF // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
     
    // CONFIG4H
    #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-30000Bh) not write-protected)
    #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
    #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
    #pragma config SCANE = ON // Scanner Enable bit (Scanner module is available for use, SCANMD bit can control the module)
    #pragma config LVP = OFF // Low Voltage Programming Enable bit (HV on MCLR/VPP must be used for programming)
     
    // CONFIG5L
    #pragma config CP = OFF // UserNVM Program Memory Code Protection bit (UserNVM code protection disabled)
    #pragma config CPD = OFF // DataNVM Memory Code Protection bit (DataNVM code protection disabled)
     
    // CONFIG5H
     
    // CONFIG6L
    #pragma config EBTR0 = OFF // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
    #pragma config EBTR1 = OFF // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
     
    // CONFIG6H
    #pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
     
    #include <xc.h>
     
    void SPI_config() {
    //set data direction for ports in SPI communication
    //RB5=Data In (I); RB4=Data Out (O); RB3=SPI clock (O); RB2=Chip Select (O))
    TRISBbits.TRISB1 = 0; //Output (because I dont wanto to user it in master mode)
    TRISBbits.TRISB2 = 0; //Output
    TRISBbits.TRISB3 = 0; //Output
    TRISBbits.TRISB4 = 0; //Output
    TRISBbits.TRISB5 = 1; //Input

    //set logical Functions
    RB3PPS = 0b01111; //clock for SPI on RB3 (as output)
    SSP1CLKPPSbits.SSP1CLKPPS = 0b01011; //clock for SPI on RB3 (as input)
    SSP1SSPPSbits.SSP1SSPPS = 0b01001; //SS for SPI on RB1 (TRISB is an output since we dont want to use it)
    RB4PPS = 0b10000; //DATAOUT for SPI on RB4
    SSP1DATPPSbits.SSP1DATPPS = 0b1101; // set SPI data input to RB5

    //set SPI protocol settings
    SSP1STATbits.SMP = 0; //Input data is sampled at the middle of data output time
    SSP1STATbits.CKE = 1; //Transmit occurs on the transition from active to Idle clock state
    SSP1CON1bits.CKP = 1; //Idle state for the clock is a high level
    SSP1CON1bits.SSPM = 1; //SPI Master mode: Clock = FOSC/16 = 4MHz

    //activate SPI Module
    SSP1CON3bits.PCIE = 0; //Stop detection interrupts are disabled
    SSP1CON3bits.SCIE = 0; //Start detection interrupts are disabled
    LATBbits.LATB2 = 1;
    SSP1CON1bits.SSPEN = 1;
    }
     
    void SPI_writebByte(char data) {
    SSP1BUF; // dummy read to clear BF flag
    SSP1BUF = data; //send data
    while( !SSP1STATbits.BF ); // wait until 'BF' bit is set
    }
     
    void main(void) {
    OSCFRQbits.HFFRQ = 5; //16MHZ; fosc/4 = 4MHz
    SPI_config();

    while(1) {
    LATBbits.LATB2 = 0;
    SPI_writebByte(0x55);
    LATBbits.LATB2 = 1;
    }
    }

    post edited by pedro.duarte - 2017/01/10 17:03:27
    #12
    qhb
    Superb Member
    • Total Posts : 9999
    • Reward points : 0
    • Joined: 2016/06/05 14:55:32
    • Location: One step ahead...
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 17:24:12 (permalink)
    +1 (1)
    The default values of these bits should have worked, but it could be useful to try forcing them into the required state.
    PMD0bits.SYSCMD = 0;    //System clock network enabled
    PMD4bits.MSSP1MD = 0;    //MSSP1 is enabled
     
     
    #13
    pedro.duarte
    Starting Member
    • Total Posts : 73
    • Reward points : 0
    • Joined: 2007/03/26 15:30:25
    • Location: 0
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 17:39:40 (permalink)
    0
    I think I finally figured it out...After bumping my head against the wall I gave up and installed MCC plugin.
     
    Using MCC to configure the pins I realized that not only it added the unlock PPS routine (which I dont think is necessary in my case) but also set the PPS Outputs to completely different values!!!
     
    MMC code:
    RB3PPS = 0x0D; //RB3->MSSP1:SCK1;
    RB4PPS = 0x0E; //RB4->MSSP1:SDO1;
     
    Datasheet values:
    RB3PPS = 0b01111; //RB3 ->MSSP1:SCK1;
    RB4PPS = 0b10000; //RB4->MSSP1:SDO1;
     
    I believe this is an error of the datasheet and costed me an entire day of work to figure out :(
     
    Anyway, I can know see the byte being clocked on the oscilloscope!
     
    Thanks for all your help
    #14
    qhb
    Superb Member
    • Total Posts : 9999
    • Reward points : 0
    • Joined: 2016/06/05 14:55:32
    • Location: One step ahead...
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 17:53:18 (permalink)
    +1 (1)
    That's annoying.
    Please raise a support ticket to ensure Microchip fix it in future datasheets.
    http://microchip.com/support
    (Support tickets are a valid way to notify Microchip of datasheet errors.)
    #15
    qhb
    Superb Member
    • Total Posts : 9999
    • Reward points : 0
    • Joined: 2016/06/05 14:55:32
    • Location: One step ahead...
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 17:56:22 (permalink)
    +3 (3)
    Scrub that. They DO know.
    Have a look on page-6 of the errata document!
    http://ww1.microchip.com/...eviceDoc/80000711B.pdf
     
    That's a lesson that takes a while to sink in. 
    ALWAYS check the errata document when starting with a new chip. 
    post edited by qhb - 2017/01/10 17:58:49
    #16
    pedro.duarte
    Starting Member
    • Total Posts : 73
    • Reward points : 0
    • Joined: 2007/03/26 15:30:25
    • Location: 0
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/10 19:05:00 (permalink)
    0
    Thanks :) will keep that in mind but.... whats the point, for Microchip, to keep a faulty datasheet on the PIC homepage if they already know whats wrong with it?
     
    I did assume that they created a new, corrected, version of the datasheet everytime a typo was found and the respective errata written. 
     
    well, anyway, I'll read the erratas from now on :) No point on arguing over this :) 
    Thank you very much once again!
    #17
    CinziaG
    die fucking humans
    • Total Posts : 3145
    • Reward points : 0
    • Joined: 2016/12/07 14:20:36
    • Location: Wien
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/11 03:19:16 (permalink)
    0
    Argh... well, nice to know you sorted it out!
     
    (now I wonder if PPS.H macros, if available, would've worked...)

    in 2018 you signed for your annihilation. in 2019 it will come ;) I promise
    my most wonderful creations here
    https://www.youtube.com/c...dPFRvtwsbSTXp6Sk6azGOQ
    #18
    qhb
    Superb Member
    • Total Posts : 9999
    • Reward points : 0
    • Joined: 2016/06/05 14:55:32
    • Location: One step ahead...
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/11 05:06:36 (permalink)
    +1 (1)
    CinziaG
    (now I wonder if PPS.H macros, if available, would've worked...)

    Nope, I checked.
    They are part of PLIB, which hasn't been updated since XC8 v1.34
    #19
    CinziaG
    die fucking humans
    • Total Posts : 3145
    • Reward points : 0
    • Joined: 2016/12/07 14:20:36
    • Location: Wien
    • Status: offline
    Re: [Easy Question] SPI configuration not working 2017/01/11 05:09:27 (permalink)
    0
    I see.. yeah, makes (some) sense

    in 2018 you signed for your annihilation. in 2019 it will come ;) I promise
    my most wonderful creations here
    https://www.youtube.com/c...dPFRvtwsbSTXp6Sk6azGOQ
    #20
    Page: 12 > Showing page 1 of 2
    Jump to:
    © 2019 APG vNext Commercial Version 4.5