• AVR Freaks

Hot!Assigning Literal Data to SFR from SCL

Author
IO
Starting Member
  • Total Posts : 77
  • Reward points : 0
  • Joined: 2011/01/08 11:45:44
  • Location: 0
  • Status: offline
2016/03/05 18:20:34 (permalink)
0

Assigning Literal Data to SFR from SCL

Function accessin() can be used to assign data from a file to a SFR.
microchip.wikidot.com/mplabx:scl-ref-accessin

I want to do away with the extra step of creating a file, and pass a literal from SCL instead. I already have a SCL file attached that does other things.
 
In particular, I want to assign ADC conversion value to ADRESL.

How can I do this?
 
Thanks.
post edited by IO - 2016/03/05 18:25:41
#1

7 Replies Related Threads

    GeorgePauley
    Moderator
    • Total Posts : 1153
    • Reward points : 0
    • Joined: 2009/12/01 13:59:30
    • Location: Chandler AZ
    • Status: offline
    Re: Assigning Literal Data to SFR from SCL 2016/03/07 09:46:32 (permalink)
    0
    Easy peasy...
     
         ADRESL <= 32;
     
    There's a pretty good SCL User's Guide that ships with MPLAB X.  You can find it in the MPLAB X installation.  Here is the default Windows location:
     
    C:\Program Files (x86)\Microchip\MPLABX\v3.25\docs\SCL_Users_Guide
     
    #2
    IO
    Starting Member
    • Total Posts : 77
    • Reward points : 0
    • Joined: 2011/01/08 11:45:44
    • Location: 0
    • Status: offline
    Re: Assigning Literal Data to SFR from SCL 2016/09/24 18:02:27 (permalink)
    0
    So, how do I make this execute on demand?
    ADRESL <= 32;

    #3
    GeorgePauley
    Moderator
    • Total Posts : 1153
    • Reward points : 0
    • Joined: 2009/12/01 13:59:30
    • Location: Chandler AZ
    • Status: offline
    Re: Assigning Literal Data to SFR from SCL 2016/09/26 08:56:59 (permalink)
    +1 (1)
    IO
    So, how do I make this execute on demand?
    ADRESL <= 32;





    I would just write a simple SCL process and then inject it (repeatedly) each time it is needed.
     

    process is begin
       ADRESL <= 32;
       wait;                   // terminate the process
    end process

     
    If you use packetin() (see SCL User's guide) you can specify that values are read into ADRESL when the simulated ADC determines the next conversion has completed.  This might be more in line with what you are trying to accomplish?
    #4
    Chris White
    New Member
    • Total Posts : 9
    • Reward points : 0
    • Joined: 2011/05/24 03:40:36
    • Location: Bristol, United Kingdom
    • Status: offline
    Re: Assigning Literal Data to SFR from SCL 2019/08/09 12:02:32 (permalink)
    0
    I'm using MPLAB X v5.05 and the only way I can inject values into any SFR is using "accessin". If I try using "packetin" or "<=" I don't get any error messages but the code under test clearly isn't seeing the data value I want to pass in.
     
    Anybody got suggestions as to why this might be? Whilst I can use "accessin" having to have lots of data files around is really clumsy.

    --
    Chris White
    #5
    GeorgePauley
    Moderator
    • Total Posts : 1153
    • Reward points : 0
    • Joined: 2009/12/01 13:59:30
    • Location: Chandler AZ
    • Status: offline
    Re: Assigning Literal Data to SFR from SCL 2019/08/09 14:37:21 (permalink)
    0
    packetin() will only work with UART RCREG and ADC ADCBUF registers.  And only when the peripherals are actually turned on and used.  (And in the case of ADC, only when the "use mplab 8 style injection" setting is set.
     
    You should just be using <= operator, e.g.         
     

         PORTA <= 128;

     
    This is the simplest statement in SCL, and is known to work.  I suspect you are running into timing issues.  The SCL file is ran immediately upon loading.  If you load the SCL file and then start the simulator, simulator will go through a power on reset and overwrite whatever the SCL file did.  You can either delay loading the SCL file until the right moment in the debug session, or put gating code in the SCL file.  For example
     

         wait until PC == 100 ;        // wait until PC gets to address 100
         PORTA <= 128;                 // ... and THEN set PORTA to 128

     
    #6
    Chris White
    New Member
    • Total Posts : 9
    • Reward points : 0
    • Joined: 2011/05/24 03:40:36
    • Location: Bristol, United Kingdom
    • Status: offline
    Re: Assigning Literal Data to SFR from SCL 2019/08/10 03:53:03 (permalink)
    0
    Thanks for the quick response George. I'm already using a "wait until PC ...".
     
    The code I'm testing is,
    ...
    _CANInit:
      clrf EECON1
      setf EEADR ; Point to last location of EEDATA
      setf EEADRH
      bsf EECON1, RD ; Read the control code
      incfsz EEDATA, W

      goto RESET_VECT
    ...

    The following SCL fails to perform the skip on rolling over to zero,
    ...
          wait until PC == _CANInit;
          report("bootload_test: Reached _CANInit");
          EEDATA <= 16#FF#;
    ...

    Whereas this SCL does,
    ...
          wait until PC == _CANInit;
          report("bootload_test: Reached _CANInit");
          accessin("boot_bootload.eedata", hex_mode, EEDATA, false);
    ...

    As a bonus question I find reading SFR fields doesn't seem to be working either,
    ...
          wait until PC == _CANInit;
          report("bootload_test: Reached _CANInit");
          if EECON1.RD == '0' then
            report("bootload_test: Waiting for EE read");
            wait until EECON1.RD == '1';
            report("bootload_test: Reading EE");
    ...

    Reports waiting for EE read but then hangs without reporting actually reading from EE.

    --
    Chris White
    #7
    GeorgePauley
    Moderator
    • Total Posts : 1153
    • Reward points : 0
    • Joined: 2009/12/01 13:59:30
    • Location: Chandler AZ
    • Status: offline
    Re: Assigning Literal Data to SFR from SCL 2019/08/12 10:30:12 (permalink)
    0
    Everything works the way it supposed to!  :)  There is a fundamental difference in <= versus accessin().  <= happens immediately, accessin() happens when the application code attempts to read the associated register.

    So the first SCL snippet (using <=) will set EEDATA to FF before the CLRF EECON1 instruction in your application code.  The subsequent BSF EECON1, RD instruction will blow the FF value away before the increment and test.

    The second SCL snippet (using accessin()) will wait until the INCFSZ instruction "reads" EEDATA to inject the FF.  In other words, you get the behavior you're after.

    I now, understand your original question better, and the answer is "no" there is no other way to get this type of "on-demand" register injection.

    To the EECON.RD issue, the RD bit doesn't actually stay set.  The simulator immediately turns it off when the user code sets it.  An unfortunate side-effect is that the SCL code ends up not seeing the bit set.
    #8
    Jump to:
    © 2019 APG vNext Commercial Version 4.5