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MrStive
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Re:ADC Protection (final solution) 2012/06/17 17:29:36 (permalink)
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Hi Ian,
Thanks for your reply!
 
Ian.M
The instrumentation amp's output cas the potential to swing more than +/- 4V.  This will exceed the maximum +ve ADC input voltage for all 3.3V PICs and the maximum negative ADC input voltage for ALL PICs.  The question is: Does your clamping circuit guarantee the output doesn't hit the rail?

Would you suggest adding another clamp to the output of the amp (between clamprail and 0V)? I cant really lower the rail voltages because I'm close to the V_ICMR. I could lower the clamp resistor as well to allow more current, however I don't expect to be running the phase voltage near the limits. The usual voltage +input the opamp will see will be more like 2.5V.

Ian.MYou have not shown a gain programming resistor for the INA129.  I assume that this is deliberate and you are using it as a unit gain difference amplifier.   Even so, i would not trust the output to track the input if you have exceeded the input common mode range. Also it may hit the rail during power-up or power-down transients.

Yes, unity gain is deliberate. Ah, I only checked the typical V_ICMR, the minimum is 3V, whereas typ is 3.6V (for 5V supply). Perhaps I need to hand-pick, but that's a poor solution really.

Ian.MFinally you -ve BAT54 clamp appears to be connected to a resistive divider so will not only be ineffective but will also pollute the -312.5 mV rail during any negative transients.

Good pickup... guess i'll have to create another clamping rail at -300mV.
 
 
Perhaps selecting a rail-rail instrumentation amp would be better? This would fix most of my problems.. I'll have a look around.
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MrStive
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Re:ADC Protection (final solution) 2012/06/19 22:31:24 (permalink)
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Hi Ian,
Tried to replicate your clamping rail for -300mV, but failed miserably. Here is what I came up with in the end.
 

 
 
I modeled it on LTSpice and it does alright, but could be better. Suggestions? I couldn't have the double PNP as it disrupted my voltage divider.
 
Alternatively I could replace the lower clamp with a 4V zener to protect the instr amp from hitting the lower rail. This shouldn't have much leakage at 312mV which is the maximum negative value I want the signal to get to. I could then protect the ADC on the output of the opamp with another set of schottkys. Is this better?

 
 
I'm a bit hesitant for the zener method as i need this reading to be as accurate as possible.
Any input/feedback you have would be greatly appreciated.
 
S
 
 
 
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Ian.M
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Re:ADC Protection (final solution) 2012/06/19 23:27:55 (permalink)
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So why do you want to permit the input to go negative at all?
 
Simply clamp to ground (short out the Zener) and add a resistor between the amp output and the output clamps.  Feed the PIC from the resistor.  You CANNOT clamp a low impedance source satisfactorily.  1K should work well.
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MrStive
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Re:ADC Protection (final solution) 2012/06/19 23:42:20 (permalink)
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Ian.M

So why do you want to permit the input to go negative at all?

 
Unfortunately the input U becomes negative by a few volts in some instances. By adding 300mV offset I'm allowing it to go to -40V, though it probably will peak at around -4V. Is there a better clamp method?
 

Ian.M add a resistor between the amp output and the output clamps.  Feed the PIC from the resistor.  You CANNOT clamp a low impedance source satisfactorily.  1K should work well.

Okay, thanks. I'm hoping it wont have noticeable effect on my accuracy? Otherwise I might have to leave out the output clamp
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Ian.M
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Re:ADC Protection (final solution) 2012/06/20 00:22:08 (permalink)
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Ah, that wasn't stated in your original requirements.
You would need to buffer your -312.5mv potential divider output before you could use it for the two transistor clamp circuit.   (which needs to be mirrored using NPN transistors for a -ve clamp anyway).
Its probably simpler to rough clamp at around -0.5 to -1V and let the output clamp handle the rest of the problem.
The rough clamp circuit MUST NOT LOAD your -312.5mV rail.
 
A rough clamp circuit could be as simple as forward biassing an ordinary silicon diode, anode to ground with a resistor to -5V chosen to fass a couple of mA to maintain at least -0.5V across it then connect the low side BAT54 to its cathode.
 
The output clamp series resistor can be reduced considerably.  I wouldn't go below 220R as the dissipation in the amp may become high enough to cause thermal drift. Even with 1K, it  shouldn't produce a noticeable change in the ADC result when it is NOT clamping.
 
post edited by Ian.M - 2012/06/20 00:33:08
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MrStive
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Re:ADC Protection (final solution) 2012/06/20 01:33:59 (permalink)
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Ian.M
A rough clamp circuit could be as simple as forward biassing an ordinary silicon diode, anode to ground with a resistor to -5V chosen to fass a couple of mA to maintain at least -0.5V across it then connect the low side BAT54 to its cathode.

Haha that's an excellent idea!

Ian.M The output clamp series resistor can be reduced considerably.  I wouldn't go below 220R as the dissipation in the amp may become high enough to cause thermal drift. Even with 1K, it  shouldn't produce a noticeable change in the ADC result when it is NOT clamping.

Might do some calcs on this.
 
 
Can you check my circuit to make sure it's correct? I was thinking of this diode, it shows a forward voltage vs current graph http://www.fairchildsemi.com/ds/1N/1N4148WS.pdf
I really appreciate your help, thanks!
 

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Ian.M
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Re:ADC Protection (final solution) 2012/06/20 03:25:58 (permalink)
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Everything looks fine.
 
Looking at the graph for INA129 output voltage swing vs output current, it only goes up to 4 ma so don't reduce R_out below the 1K you have! If you need a lower dynamic output impedance, you could add a capacitor at the ADC input.  To get an idea of the value required, multiply the internal sampling capacitance by DOUBLE the maximum ADC count for a shift during sampling of less than 1/2 LSB.  Don't forget to check the RC time constant is acceptable!  (The CHOLD sampling capacitance value can usually be found in the ADC section of the datasheet, either on the internal schematic or in the acquisition time calculation but is NOT in the characteristic section at the end.) 
 
You could save some power by increasing R_d to 3.9K as even at 150 deg C 1 mA through a 1N4148 is going to give you >0.5V Vf.
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MrStive
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Re:ADC Protection (final solution) 2012/06/20 15:34:05 (permalink)
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Ian.M
Looking at the graph for INA129 output voltage swing vs output current, it only goes up to 4 ma so don't reduce R_out below the 1K you have! If you need a lower dynamic output impedance, you could add a capacitor at the ADC input.  To get an idea of the value required, multiply the internal sampling capacitance by DOUBLE the maximum ADC count for a shift during sampling of less than 1/2 LSB.  Don't forget to check the RC time constant is acceptable!  (The CHOLD sampling capacitance value can usually be found in the ADC section of the datasheet, either on the internal schematic or in the acquisition time calculation but is NOT in the characteristic section at the end.) 

 
The sampling resistor is 4pF. Don't know exactly what you mean by ADC count? The ADC clock freq is 30Mhz, and the minimum sampling time is 3 clock cycles. Are you after 3/30e6=0.1uS?
 
I found this formula:
R_ext = ((k-0.5)/(f_adc*C_adc*ln(2^(N+2))) - R_adc
Where
- R_ext = maximum external input impedance for error below 1/4 LSB
- N=adc resolution ->12
- K=sampling periods -> 3 samples or 0.1uS
- R_adc = sampling switch resistance -> 6k
 
However, using this formula I get a negative values for R_ext.
If i set K to 2Msps, I get 1.7Mohm which still isn't right.
 
Thoughts?
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Ian.M
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Re:ADC Protection (final solution) 2012/12/04 07:46:27 (permalink)
+2 (1)
Foolowing up much too late for the OP, but hopefully to clear up any future confusion, the maximum ADC count is the highest number the ADC module can read.  it is 2N-1 where N is the number of ADC bits.  So for the common 10 bit PIC ADC, the maximum count is 1023.  Assuming 120pF CHOLD for a typical PIC16:
     120pF x 2 x 1023  ≈ 246nF
220nF wont *QUITE* meet the 1/2 bit worst case voltage shift due to charge sharing requirement but is pretty good and if the input resistance isn't grossly excessive will meet spec.  330nF meets spec even if the source is high impedance - but you now have to be concerned about input leakage current.   The ADC will give the same result as a DVM connected to the input capacitor, but that is likely to be rather different from the voltage at the other end of the input resistor.
 
The worst case for charge sharing error is when you alternate between converting a channel with Vin near Vdd and one with Vin near Vss, or when Vin swings from one rail to the other between measurements.
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jdraughn
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Re:ADC Protection (final solution) 2013/06/13 04:34:09 (permalink)
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Sorry to bring up an old thread, but exactly what was the final solution?  I would like to build an auto ranging voltmeter capable of measuring a few hundred volts, and I have been researching the best way to protect the ADC input in case of over voltage.
 
Basically I'm thinking that the voltage being measured will pass through a 1M resistor (or higher to keep the input resistance high) and then my microcontroller will ground various lower leg resistors to change the output voltage.
 
The output voltage would then pass through a 1k resistor with the Schottky diode clamps to ground and VDD before it passes through a PGA/Buffer and then finally into the ADC port.
 
I have searched high and low for some documentation or circuits detailing how to use a microcontroller to measure an unknown voltage that auto ranges, and I have not really come up with anything.
 
 
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DarioG
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Re:ADC Protection (final solution) 2013/06/13 05:11:46 (permalink)
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I'd still use relays and resistor dividers for that Smile

GENOVA :D :D ! GODO
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JDW
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Re:ADC Protection (final solution) 2017/08/27 19:57:03 (permalink)
+1 (1)
This thread is ancient but appropriately named, so I decided to reply to it rather than create a new thread.  Hopefully my post will generate a more detailed response than jdraughn's did back in 2013...
 
The 2-part summary of this thread seems to be this:
 
1) Steven37 suggesting that Schottky diodes be used to clamp the input to the supply rails:
 
http://www.microchip.com/forums/FindPost/634495
 
2) Ian.M proposing a more complex circuit to avoid caveats with Steven37's circuit:
http://www.microchip.com/forums/FindPost/634506
 
I myself intend to use a PIC12F1571 & ADC to read voltages on the Steering Pad Switch Assembly of various cars.  Such is often seen on higher end cars, where you have Volume + & - buttons, Seek + & -, etc.  On Toyota cars we know the max voltage to be less than 5V (e.g., Vol- ~= 2.32V, Vol+ ~= 1.44V, Nothing Pushed = 3.24V).  So my intention is to create a device that allows the driver to push Vol- a couple times followed by Vol+ a couple times as a trigger for my PIC to perform a special function.  The ADC would read the voltage and I would need to write PIC code that determines how close the input signal is to the predetermined values (i.e., is Vol- being pressed or Vol+ or something else?).  I've not used the ADC before, but I believe I know how best to follow the datasheet and go about it in code. My reason for replying to this thread is because I want to protect the ADC input for an AUTOMOTIVE environment.
 
Installers sometimes do stupid things.  They might connect the ADC input wire directly to +12V for several MINUTES.  Or the input might see a 120V 400ms Load Dump.  I know how best to protect my digital inputs, but is Ian.M's proposed circuit still the best ADC input protection solution for an automotive application now in 2017?
 
The other issue that complicates matters is that I also intend to use a Sallen-Key LP filter to noise-filter Vin.  Since I'm reading fixed voltage values with the ADC input, I can set Fc ≈ 16Hz and be fine.  (R1=100k, R2=1M, C1=100n, C2=10n)
 
http://sim.okawa-denshi.jp/en/OPstool.php
 
So what front-end voltage-spike protection filtering (for an automotive environment) should I use?
 
Thanks.
post edited by JDW - 2017/09/05 00:10:20
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Ian.M
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Re:ADC Protection (final solution) 2017/09/05 02:13:00 (permalink) ☄ Helpfulby JDW 2017/09/06 18:29:20
+2 (2)
@JDW,
My input protection circuit you referred to handles the special case of clamping an external input voltage, usually from a potential divider, without dumping current into the positive rail, while maintaining a full rail to rail  input range. As its after your filter, the ADC input isn't exposed to external abuse. so doesn't need that sort of clamping, as the OPAMP's output cant drive outside the rails.
 
The problem then becomes protecting the OPAMP.   The easiest way to do that without loading the signal source (as any significant extra loading could cause the built in  sound system to malfunction) is to use an OPAMP that can tolerate extreme input conditions + a series resistor and shunt TVS diode to handle any spikes the OPAMP cant cope with.
 
e.g. you could use L.T's LT6015: http://www.linear.com/solutions/1141
As long as its powered from the same 5V rail as the PIC, and is used in a non-inverting configuration, no further protection would be required for the analog input.  If you use an inverting configuration, you must consider the maximum possible current that can flow through the feedback resistor.  If its less than the OPAMP's output drive current capability, nothing further needs to be done., otherwise you will probably need to split the feedback resistor and clamp the midpoint to divert the excess current.
post edited by Ian.M - 2017/09/05 02:19:07

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#33
JDW
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Re:ADC Protection (final solution) 2017/09/05 19:16:30 (permalink)
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@Ian.M
 
I greatly appreciate your detailed reply.
 
I must say though that the LT6015 is quite expensive at $2 for quantities of 250pcs, and as you correctly said, a TVS diode would be in addition to that cost.  In contrast, Microchip's MCP601 runs about $0.33 for the same quantity.  But of course, the MCP601 has fairly pathetic Absolute Max Specs:
 
Vdd-Vss = 7.0V
All I/O = Vss-0.3V to Vdd+0.3V
 
The NON-inverting op-amp filter to be used with my PIC12F1571 ADC input pin will look like this:
 

 
The above simulation shows a fixed input voltage of 1.44V but with 0-peak noise of 200mV riding on it, at 60Hz.  As shown, the op-amp filters out that noise quite well, and Vout becomes pretty much a flat 1.44V when the noise frequency rises to 200Hz and higher.
 
Since I'm only reading fixed voltages via ADC (not signal waveforms), the filter's Fc can be very low (15.9Hz in the above design) and R1 & R2 are fairly large as a result.  (The MCP601's Vdd = Vcc = 5.0v and it's Vss = 0.)  That offers some op-amp protection, but for a short-term 70V spike on Vin would pose a problem.  A TVS with Vr=6.0V is available, but that is still higher than Vdd+0.3V.  Perhaps I can rustle up a CHEAP op amp with 20V or so capable V+ and V- inputs which would work more nicely with a TVS diode.
 
Thanks for sharing your thoughts.
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