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USB Ping Pong on 18F4550

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searow
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2011/05/08 15:14:00 (permalink)
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USB Ping Pong on 18F4550

I've set up an 18F4550 based on Brad Minch's assembly code, and I only have requirements for IN transfers.  I'm looking for a transfer rate of around 600,000 B/s, which I've been able to achieve on a single bulk endpoint that is constantly sending packets of 64 Bytes of  data whenever the CPU owns the UOWN bit.  However, I am using a CCP module to measure the frequency of an incoming square wave, so I think I need to use ping pong buffering in order to have a buffer available for the CPU to write the incoming data to while the SIE is reading data. 

I'm trying to use ping pong on all EP's except EP0, but I just can't seem to get the ping pong to work.  The even buffers are constantly being sent, but the odd one's aren't being sent.  I'm monitoring the PPBI bit as well as the UOWN bit for the odd buffers, but they never seem to change.  I just can't seem to figure out the steps for setting up ping pong properly.  Could someone who has set up ping pong before please go over the steps that I should take in order to change a non-ping pong device into one that uses ping pong?  Any help is greatly appreciated.
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    xiaofan
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    Re:USB Ping Pong on 18F4550 2011/05/08 19:08:15 (permalink)
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    Not so sure if this helps but Olin's Assembly based firmware stack supports Ping-Pong.
    http://www.embedinc.com/pic/usb.htm
    http://forum.microchip.com/tm.aspx?m=278560
    http://forum.microchip.com/tm.aspx?m=141123

      USB_Links and libusb
    #2
    newfound
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    Re:USB Ping Pong on 18F4550 2011/05/08 20:31:10 (permalink)
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    Ping-pong buffering requires a lot more code to keep the SIE in sync with the host and it is not so easy to do with the PICs sie. There have been long discussions here about this and it took microchip until version 2.8 of there stack to get it right. On the PIC18 I just cannot see that you gain anything mucking around with this. The bandwidth of USB is far greater than what the PIC18 can use.

    If you add ping-pong buffering there are numerous other things to address in the CHP9 requests etc. I just do not see that it is required or worthwhile in the case you describe. Instead I would just double buffer the CCP data in USB ram and switch addresses in the buffer descriptor. If you aline the two buffers on a modulo 64 bounary switching between them is a simple BTG instruction. That is all that is required.  Very simple and I am near certain it will be marginally quicker than full ping-pong (on the PIC18 family.)


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    chinzei
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    Re:USB Ping Pong on 18F4550 2011/05/08 22:38:24 (permalink)
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    Could someone who has set up ping pong before please go over the steps that I should take in order to change a non-ping pong device into one that uses ping pong?

    When the bulk/interrupt endpoint is managed in polling,
    0) Add a static flag, which indicates EVEN/ODD of the endpoint, on your firmware.
    1) Poll the UOWN bit of BDnSTAT, indicated by your EVEN/ODD flag.
    2) If UOWN shows core side (0), set up the BD and packet buffer as usual
    3) Pass the BD to SIE by setting UOWN to SIE side (1). Also flip your EVEN/ODD flag.
    4) Get back to polling 1)

    For "ping-pong all EPs except for EP0" mode,
    your firmware initializes your EVEN/ODD flag to EVEN, when the device receives Set_Configuration request. Also, reset ping-pong of SIE using UCON.PPBRST bit.

    For completeness of USB spec compliance, we have to count in ping-pong initialize at Set_Interface and Clear_Feature( ENDPOINT_HALT ) requests. But if your application doesn't use these requests, you may leave them untouched.


    When the endpoint is managed in hardware interrupt, your EVEN/ODD flag is also added and processed like above polling case.

    To start IN transfer using hardware interrupt, the first and the second packets are passed to SIE outside of the endpoint ISR. The order of packet filling follows your EVEN/ODD flag. While filling the endpoint, USB interrupt is temporarily disabled.

    The completion of an IN transaction sets UIR.TRNIF bit, and USB interrupt is evoked. In the endpoint ISR, your firmware reads out USTAT. If USTAT points your target endpoint, either EVEN or ODD, push the next packet to the endpoint, seeing your EVEN/ODD flag. And flip your EVEN/ODD flag. ie. the same process as above 2) and 3).


    The point is, your EVEN/ODD flag, which is managed in your firmware. 

    Tsuneo
    post edited by chinzei - 2011/05/08 23:03:52
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    searow
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    Re:USB Ping Pong on 18F4550 2011/05/09 18:18:20 (permalink)
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    Thank you all for your help.  I created a space in memory to keep track of which buffer I should be reading from, and it seems to be working fine.  What is the maximum speed that I should be able to get out of a single endpoint bulk transfer like this on the 18F4550, provided I'm always sending 64 bytes per packet?
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    chinzei
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    Re:USB Ping Pong on 18F4550 2011/05/10 01:26:46 (permalink)
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    What is the maximum speed that I should be able to get out of a single endpoint bulk transfer like this on the 18F4550, provided I'm always sending 64 bytes per packet?

    You've said in your first post that your setup goes to 600,000 B/s. Double buffering doesn't increase this rate at all. It works to keep this rate, by overlapping USB transaction by SIE and your firmware process. When the firmware process takes time so long, more than single transaction by SIE, the transfer speed slows down, even on the double buffer.

    In principle, when the device always sends full-size packets (64 bytes), and when the PC app request as great transfer size as possible, bulk transfer reaches to the max speed. But this principle is modified to fit to your purpose.

    Do you send the data just for recording, or for any "real-time" process?
    For "real-time" process, you have to define the deadline timing of the transfer process.

    Tsuneo
    post edited by chinzei - 2011/05/10 02:12:53
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    searow
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    Re:USB Ping Pong on 18F4550 2011/05/10 11:53:30 (permalink)
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    At the moment I'm simply dumping preset data, but my final application will have to modify the buffers in a "real-time" process.  I was just wondering if this range of speed (~600,000 B/s) is typical or if others have gotten an 184550 to be even faster.  Also, does anyone happen to know the time span between when the SIE gets control of a 64 Byte packet and when it clears the UOWN bit?
    post edited by searow - 2011/05/10 11:54:31
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    searow
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    Re:USB Ping Pong on 18F4550 2011/05/11 11:24:56 (permalink)
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    Another question: The one-way usb communication by itself seems to work fairly well, and the ccp itself works fairly well.  However, when I put the two together, the usb stops working.  I hear the sound of it connecting, but a second later, I hear the disconnecting sound.  If the ccp module is interrupting fast enough (~300kHz), can this disrupt the usb module?
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    johnmx
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    Re:USB Ping Pong on 18F4550 2011/06/28 17:35:45 (permalink)
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    searow 

    I'm trying to use ping pong on all EP's except EP0, but I just can't seem to get the ping pong to work.  The even buffers are constantly being sent, but the odd one's aren't being sent.  I'm monitoring the PPBI bit as well as the UOWN bit for the odd buffers, but they never seem to change.  I just can't seem to figure out the steps for setting up ping pong properly.  Could someone who has set up ping pong before please go over the steps that I should take in order to change a non-ping pong device into one that uses ping pong?  Any help is greatly appreciated. 

    Is your device A3 revision? If so, the answer is in the errata:

    14. Module:  USB
    The Ping-Pong Buffer mode in which the ping-pong buffers   are   enabled   for   Endpoints   1   to   15 (UCFG<PPB1:PPB0> = 11) is not supported.
    Work around:
    Use other Ping-Pong Buffer modes.

    Simple as that wink


    Best regards,
    johnmx
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    tammna
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    Re:USB Ping Pong on 18F4550 2011/07/13 01:14:24 (permalink)
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    hey which dlll files are u using ...comvcon 's dll file ?
    searow

    I've set up an 18F4550 based on Brad Minch's assembly code, and I only have requirements for IN transfers.  I'm looking for a transfer rate of around 600,000 B/s, which I've been able to achieve on a single bulk endpoint that is constantly sending packets of 64 Bytes of  data whenever the CPU owns the UOWN bit.  However, I am using a CCP module to measure the frequency of an incoming square wave, so I think I need to use ping pong buffering in order to have a buffer available for the CPU to write the incoming data to while the SIE is reading data. 

    I'm trying to use ping pong on all EP's except EP0, but I just can't seem to get the ping pong to work.  The even buffers are constantly being sent, but the odd one's aren't being sent.  I'm monitoring the PPBI bit as well as the UOWN bit for the odd buffers, but they never seem to change.  I just can't seem to figure out the steps for setting up ping pong properly.  Could someone who has set up ping pong before please go over the steps that I should take in order to change a non-ping pong device into one that uses ping pong?  Any help is greatly appreciated.


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