EEPROM: Erase a zero word before writing?

The "erase' sequence is actually a required part of the "write" cycle to prevent "unwanted" writes, which is why it must immediately preceed the write.

Never really thought about it.  Does explain why it is mandatory

threedog

If the expected updates exceede the EEPROM cycle rate, then you should consider a wear leveling algorithym.
A simple method might be to read after write, and if the values do not match, then find another location to write the data.
This implies that data is not at absolute EEPROM addresses.
 

Is it safe to assume that if a word reads back the value that was just written, that the new value will "stick" permanently? Or do nearly-worn-out cells have a tendency to spontaneously flip a bit once in a while, even after successful verification? In other words, would it be advisable to maintain a cycle counter for each cell and assume that the cell is worn out when a certain cycle count is reached? Of course, by the time that the cycle counter reached the threshold, the cycle counter EEPROM would also be worn out and need to be discarded, which would add to the memory cost.  
 
If your life depended upon the accuracy of the EEPROM data, would you wait until verification failure occurred before abandoning the cell and moving the data to a new one, or would you proactively abandon the cell after a certain number of cycles?  (or use a combination of both approaches?)
 
Maybe I should be thinking in terms of error-correcting codes?
 
Thanks.

Seriously is this used for critical operations that could result in harm to a person? If so then you should talk to Microchip about this.

Random Changes? The good old classic cosmic ray, could hit the chip and change its value. Its not impossible, the not excatly an everyday event, that it could flip.

Hence, Im happy bet $10 on it staying the same (odds are I'll make a bit of money) but not my life....