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ADC Input Leakage

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jpopelish
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RE: ADC Input Leakage 2008/09/04 16:37:24 (permalink)
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ORIGINAL: MrCal

joepopelish:

You missed my previous post because you posted about the same time i did.
Go back and read that and see if it makes more sense to you after that.
(snip)


I have no problem with anything you posted.   If one is trying to do solid design with the information given in the data sheet, your drawing is about the best you can do. 

If we are talking about what might be possible if you were willing to experiment and find out if you could extract more information than the data sheet provides, other possibilities might open up.  This discussion has been partly about what ideas those experiments might be based upon.  Somewhat hypothetical, but a good mental exercise to make sure one is thinking clearly about what is going on (or might be going on) inside a PIC and ultimate ways to push the performance to the limit if one is willing to find additional information.  Needless to say, measuring nanoampere currents under various experimental conditions (for even one chip) is not a trivial task.  But the discussion about mechanisms is valuable, I think.

John Popelish
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DSchabel
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RE: ADC Input Leakage 2008/09/05 07:43:19 (permalink)
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ORIGINAL: MrCal

Hi again,


jpopelish:
I think the same about the info Microchip has given us, but until
they give us more info (if they ever do) we have to assume 1ua for
the worst case, and that is what i would use to determine if a given
design would work or not.  This is where the drawing comes in.
For lack of information, we have to assume 1ua.  There's no other
way except to inquire directly to MC about this.
Some cases might be better, but we can not draw a schematic that
shows cases that we dont even know about...we can only draw what
we know for sure at the present time.  As another simple example,
MC might turn around tomorrow and say that the leakage current is
2ua, or 10ua, or 100ua, or 1na, but up to that point we draw a
schematic to show 1ua because that's what is shown in the data sheet.
We also dont let this stop us from drawing a schematic altogether,
so at least we have some current reference to go by.

Well stated.  I have to agree. 

bixelps:
Everything about the leakage states that it is the 'pin', so the
leakage is assumed to be at the pin itself due to various things.
Also, from the writeup on the ADC for this device the data sheet
states that 2.5k is the maximum recommended source impedance,
and they typically call all the resistances 'impedances' so again
i would assume this is a resistive only quantity.  Of course
they may have made that mistake about the 2.5k being for an
operating voltage of 5v, so you probably want to take that into
account also.

I agree, but I'd go even further. If an impedance is specified in ohms only, with no "j" factor (i.e. a real number only as opposed to a complex number), and no frequency specification is given (i.e. ohms at 3500Hz), then you have to assume that this is resistive. 
post edited by DSchabel - 2008/09/05 07:44:32
#22
SFJSmith
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RE: ADC Input Leakage 2008/10/02 02:59:15 (permalink)
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Hi, I also have an ADC leakage issue that I need help with. I've raised this as a Support ticket but have received no response & I'm stuck!

I am updating a design which currently uses a 16F873 to use a 16F886 instead. The existing design has been in production for some years with no ADC leakage issues.
The new part seem to have a leakage current of the order of 25uA on the selected ADC Input. I am using AN0, AN1 and AN4 as measuremet inputs with AN3 as  +4.42V +Vref for all measurements and AN2 as a +2.01 -Vref for measurements made using AN0

CCT Description:
AN1 is fed from an LM324 OpAmp via a 10K resistor. AN1 also has a 470nF capacitor to 0V to provide the current to charge the ADC Sample & Hold Capacitor

The 324, which is supplied from a single +15V rail, has a 1 Ohm current sense resistor between its +Vin & -Vin inputs and has a 1K load to 0V on its O/P.
When there is no current flowing in the 1 Ohm resistor, the load has 3mV across it and AN1 Pin has 6mV when not selected

When ADCON0 is loaded with B'01000101' , the voltage on AN1 Pin rises to 250mV (with a rise time of about 5us). The LM324 load then has 17mV across it.
These voltages are persistent, suggesting that it is not a result of the charge stored on the ADC Sample & Hold capacitor

This is causing me serious problems as the voltages I need to measure are of this order. Does anyone have any suggestions as to what might be causing this?

I have set the contents of the registers which may have an influence as follows for this measurment:
ADCON1 = B'10010000'
ANSEL = B'00011111'
ANSELH = 0
TRISA = B'00111111'
CM1CON0 = 0
CM2CON0 = 0
CM2CON1 = 0
SRCON = 0
VRCON = 0

Are there any other registers that I should have set or are any of the above settings incorrect?

Any help would be very much appreciated!

Steve Smith

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jpopelish
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RE: ADC Input Leakage 2008/10/02 13:26:21 (permalink)
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I'm not sure I am picturing your schematic correctly, or how your two reference voltages relate to measuring a signal in the millivolt range and to other inputs that are not selected by the A/D mux.
 
But one large source of increased input leakage current is any input or output being driven more than a third of a volt beyond enther supply rail.  There may be a somewhat related effect when any analoginput is driven beyond the range of Vref+ and Vref-, but that is completely hypothetical (not based on my experience).

John Popelish
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DSchabel
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RE: ADC Input Leakage 2008/10/02 14:07:43 (permalink)
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ORIGINAL: jpopelish

I'm not sure I am picturing your schematic correctly, or how your two reference voltages relate to measuring a signal in the millivolt range and to other inputs that are not selected by the A/D mux.

Yes, this is very curious.  Why have Vref+ = 4.42V, Vref- = 2.01V, and try to measure something much lower than Vref-? 

But one large source of increased input leakage current is any input or output being driven more than a third of a volt beyond enther supply rail.  There may be a somewhat related effect when any analoginput is driven beyond the range of Vref+ and Vref-, but that is completely hypothetical (not based on my experience).

Interesting. 
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SFJSmith
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RE: ADC Input Leakage 2008/10/02 15:46:16 (permalink)
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Hi Chaps,

Thanks for your responses. I don't believe that there are any pins being driven beyond the PIC supply pins but it's a good suggestion so I shall check.

To clarify the Reference voltages, the function of these measurements is to control a battery charging subsytem as a background task to the main device function.

AN0 is used to measure the battery pack voltage. This can be up to 29.5V. The circuit driving AN0 attenuates this to a 0V to 4.42V range suitable for the ADC. The battery pack actually should never be below 17V so, in order to improve the precision of the measurent, I select the 4.42V as Vref+ and the 2.01V as Vref- when converting AN0 so that an ADC readings 0 to 1023 represent battery pack voltages of 16V to 30V.

When converting AN1, which is used to measure the battery pack charging current, the 4.42V is used for Vref+ and Vss is selected for Vref-. This allows measurement of charging currents from 0 to 2.2A with a precision of 2.2mA/count.
The 250mV that I'm seeing on AN1 with no current flow translates to an offset of 150mA which is about the same as the required charging current in slow charge mode!

Hope this gives you both a better insight into my problem.

Cheers,
Steve Smith
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jpopelish
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RE: ADC Input Leakage 2008/10/02 16:43:26 (permalink)
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Thank you.  I think I have a better understanding of what you are doing and what you are seeing.  And if no voltages are found to lie outside the allowable ranges, then it is a mystery. 

I guess if I saw this, I would try varying the voltage on each pin, if possible, to find out if the leakage was linked to any other pin, or was just the supply voltage leaking through the mux. 

Have you eliminated the possibility that the voltage shift is not coming from AN1, but through the signal path from some other source?  In other words, if you open AN1, does the disconnected signal behave itself or not?

John Popelish
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SFJSmith
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RE: ADC Input Leakage 2008/10/02 17:35:05 (permalink)
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Hi John,

Thank you for your suggestions. It's a little difficult to isolate the pins as it's surface mount construction. I will remove the 10k resistor which feeds AN1 & see what happens. I have examined the board closely for shorts & there are none.
The board is a known good one with the original 873 chip removed & the 886 dropped straight in so it should be OK.

Of course, it may be that this particular 886 chip is faulty (I currnetly have an infinite sample of one wink ) or has been damaged in the fitting and I have some more 886s on order which I hope to get our Production department to mount on new boards (i.e. a fresh build rather than a reworked board) but we are in the happy position having a bulging order book at the moment so getting them to do 'specials' is a bit of an issue.

I'll post what I find here tomorrow as it's 1:30am here in the UK & I'd better go to bed!

Cheers & thanks again!
Steve Smith
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SFJSmith
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RE: ADC Input Leakage 2008/10/03 10:45:15 (permalink)
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Mr. Popelish, you are a hero!

There was indeed one digital input being driven to 5.56V when the PIC Vdd is 4.94V. Disconnecting this drive restored the voltage on AN1 tp a sensible level when selected. Interesting thet he 16F673 seems to be unaffected by the excessive drive, though.

The excessive drive can easily be cured by the addition of a 3k3 resistor to 0V so my problem is solved.

Thank you very much for your help!

Cheers,
Steve Smith
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jpopelish
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RE: ADC Input Leakage 2008/10/03 11:15:58 (permalink)
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My pleasure. 
 
It is sometimes surprising how badly unrelated parts of the chip can misbehave if even a little current passes through the input protection diodes into the substrate.  Many people assume that the absolute maximum input voltage and and clamp current specs tell you the allowable operating conditions, but they tell you only the threshold of damage.  Things go to Hell, operationally, far below those maximums, and the exact route to Hell varies for each chip layout. 

John Popelish
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