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upand_at_them
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2021/02/25 18:10:47 (permalink)
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Reading TMR0 prescale value

Is this the only way to do it?...Assuming TMR0 increments on T0CKI:
 
With another pin connected to T0CKI, change the pin to output, and toggle the pin until TMR0 increments.  Count how many toggles (N) it took.  Prescale value is 256-N.
 
I'm using 16F1829.
 
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upand_at_them
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Re: Reading TMR0 prescale value 2021/02/25 18:16:06 (permalink)
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Nevermind...found another way.
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1and0
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Re: Reading TMR0 prescale value 2021/02/25 19:56:45 (permalink)
+3 (3)
upand_at_them
Nevermind...found another way.

Do share!!!  Information exchange is both ways.  There are two other ways, depending on the PIC.
post edited by 1and0 - 2021/02/25 19:58:05
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upand_at_them
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Re: Reading TMR0 prescale value 2021/02/25 20:38:11 (permalink)
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Well, this is what I thought...
 
T0CKI is XOR'd with TMR0SE.  So why not just toggle the TMR0SE bit in OPTION_REG.  Should be the same effect as T0CKI being clocked.  It seems to work, but needs more testing.  I got a non-zero value in one setup, but a zero value in another.  If you test it, post your result.
 
post edited by upand_at_them - 2021/02/25 21:25:53
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blue_led
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Re: Reading TMR0 prescale value 2021/02/25 22:44:36 (permalink)
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Translation into english, prescaler value mean prescaler actual count ?
post edited by blue_led - 2021/02/25 23:08:01
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ric
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Re: Reading TMR0 prescale value 2021/02/26 02:34:47 (permalink)
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Yes

I also post at: PicForum
Links to useful PIC information: http://picforum.ric323.co...opic.php?f=59&t=15
NEW USERS: Posting images, links and code - workaround for restrictions.
To get a useful answer, always state which PIC you are using!
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blue_led
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Re: Reading TMR0 prescale value 2021/02/26 02:51:04 (permalink)
+1 (1)
Ok.
My idea is this: instead of input clicks at the counter input, the value of 256 will take a long time, using the multiplexer controlled by PS 2: 0, the outputs of the prescaler counter are selected.
Let's say it has the value of MSB> LSB 01001101 and assuming that TMR0 increments natively on the positive front selecting from left to right O7 (1: 256), O6 (1: 128), ... O0 (1: 2) and observing when TMR0 is incremented it can be deduced that bit O7 was 0 and O6 was 1. By scanning the counter in both directions or randomly, the prescaler does not change, and the value of the presacler can be deduced, if TM0CKI does not change.
post edited by blue_led - 2021/02/26 02:52:38
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1and0
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Re: Reading TMR0 prescale value 2021/02/26 04:46:17 (permalink)
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upand_at_them
Well, this is what I thought...
 
T0CKI is XOR'd with TMR0SE.  So why not just toggle the TMR0SE bit in OPTION_REG.  Should be the same effect as T0CKI being clocked.  It seems to work, but needs more testing.  I got a non-zero value in one setup, but a zero value in another.  If you test it, post your result.

Actually, there are at least three other ways:
  • toggle the Timer0 edge select bit OPTION_REG<T0SE>,
  • toggle the latch bit LATA<T0CKI>, and
  • toggle the port bit PORTA<T0CKI> (be aware of RMW).
Here's a link: https://www.microchip.com/forums/FindPost/622772
and I also have some assembly code somewhere in this forum.
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1and0
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Re: Reading TMR0 prescale value 2021/02/26 04:53:42 (permalink)
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blue_led
My idea is this: instead of input clicks at the counter input, the value of 256 will take a long time, using the multiplexer controlled by PS 2: 0, the outputs of the prescaler counter are selected.
Let's say it has the value of MSB> LSB 01001101 and assuming that TMR0 increments natively on the positive front selecting from left to right O7 (1: 256), O6 (1: 128), ... O0 (1: 2) and observing when TMR0 is incremented it can be deduced that bit O7 was 0 and O6 was 1. By scanning the counter in both directions or randomly, the prescaler does not change, and the value of the presacler can be deduced, if TM0CKI does not change.

That may work and have a lower maximum time at the expense of more complex code. You will have to test and verify it can deduce all 256 values of the prescaler count.
 
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oliverb
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Re: Reading TMR0 prescale value 2021/02/26 05:29:48 (permalink)
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upand_at_them
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Re: Reading TMR0 prescale value 2021/02/26 06:14:41 (permalink)
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1and0
 
Actually, there are at least three other ways:
  • toggle the Timer0 edge select bit OPTION_REG<T0SE>,
  • toggle the latch bit LATA<T0CKI>, and
  • toggle the port bit PORTA<T0CKI> (be aware of RMW).
Here's a link: https://www.microchip.com/forums/FindPost/622772
and I also have some assembly code somewhere in this forum.


The bit I was referring to is the Timer0 edge select bit.  I'll have to try the LATCH.  I tried PORTA and it didn't work for me.  Thanks for the link.
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upand_at_them
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Re: Reading TMR0 prescale value 2021/02/26 06:17:25 (permalink)
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oliverb
Might be worth a look at AN592 https://www.microchip.com/wwwAppNotes/AppNotes.aspx?appnote=en011033



Yeah, AN592 uses the method I didn't want to use: toggling another pin connected to T0CKI.  That's the app note that spawned the popular PIC frequency counter...which you can now find from various Chinese vendors.
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blue_led
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Re: Reading TMR0 prescale value 2021/02/26 06:42:08 (permalink)
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1and0
 
That may work and have a lower maximum time at the expense of more complex code. You will have to test and verify it can deduce all 256 values of the prescaler count.
 

That will be my next AsmSudoku challenge.
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1and0
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Re: Reading TMR0 prescale value 2021/02/26 07:22:59 (permalink)
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upand_at_them
I'll have to try the LATCH.  I tried PORTA and it didn't work for me.

Here's my assembly code using LATA and PORTA on a PIC18:  https://www.microchip.com/forums/FindPost/529169
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blue_led
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Re: Reading TMR0 prescale value 2021/02/26 16:19:04 (permalink)
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1and0
 
That may work and have a lower maximum time at the expense of more complex code. You will have to test and verify it can deduce all 256 values of the prescaler count.

 
My method works. ( scanning )
Unexpected for me TMR0 increases on the falling edge so it can discover a "0" following "1". ( i use 16F1769, I don't have OP device )
Starting from 0xFF value ...
At the first transition 1> 0 returning to the setting of the perscaler where "1" was indirectly found, the rest of the bits can be tested if they are "0".
At the end it must be tested by the "TMR0SE" method if all bits are "0" or "1" ( no transition found )
the code is grotesquely elongated by the BANKSEL instructions because OPTION_REG and TMR0 are in different banks
 
What is acceptable amount of registers for this code ?
post edited by blue_led - 2021/02/26 16:27:06
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1and0
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Re: Reading TMR0 prescale value 2021/02/27 02:50:45 (permalink)
+1 (1)
blue_led
My method works. ( scanning )

Good job! I don't have a project setup now to test this.
 
blue_led
Unexpected for me TMR0 increases on the falling edge so it can discover a "0" following "1". ( i use 16F1769, I don't have OP device )

That is controlled by the Timer0 edge select bit TMR0SE.
 
blue_led
Starting from 0xFF value ...
At the first transition 1> 0 returning to the setting of the perscaler where "1" was indirectly found, the rest of the bits can be tested if they are "0".
At the end it must be tested by the "TMR0SE" method if all bits are "0" or "1" ( no transition found )

Not quite understand this. Show your code.
 
blue_led
the code is grotesquely elongated by the BANKSEL instructions because OPTION_REG and TMR0 are in different banks

Use indirect register to access one of the two to avoid bank switching.
 
blue_led
What is acceptable amount of registers for this code ?

Huh?
 
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blue_led
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Re: Reading TMR0 prescale value 2021/02/27 15:59:10 (permalink)
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1and0
blue_led
Unexpected for me TMR0 increases on the falling edge so it can discover a "0" following "1"

That is controlled by the Timer0 edge select bit TMR0SE.
 
Not. TMR0SE is in front of the prescaller and I do not make any changes to this bit. I deal with the prescaller multiplexer and it is in front of TMR0, presenting different bits from the stages of the prescaller to the input of TMR0 it can be incremented or not. TMR0 like any n-stage digital counter counts on the negative edge of previous stage and MCHP does not bother to change this as it is not necessary.


1and0
blue_led
Starting from 0xFF value ...
At the first transition 1> 0 returning to the setting of the perscaler where "1" was indirectly found, the rest of the bits can be tested if they are "0".
At the end it must be tested by the "TMR0SE" method if all bits are "0" or "1" ( no transition found )

Not quite understand this. Show your code.

This is final loop. the rest of code is work in progress it don't deal with any prescaler values, written just for test some values and it work for values from 0xFE down to 0x02. it just detect sequence "10" inside byte. Starting from comfirmed "1" the final loop find the rest of prescaler byte.
PrescalerVlaue is initialised with 0xFF , from another loop Shure_1_position is loaded with OPTION_REG value where first confirmed bit having value of "1" from prescaler was found.

FinalScan
    movlw 0x20         ; This avoid use 2 IORLW instruction later
    movwf Step
    movf INDF0 ,W
    movwf TMR0_TEMP
FinalScan_loop
    movf Shure_1_position ,W     ; we will test if there is an increment of TMR0
    movwf OPTION_REG             ; meaning the bit tested is 0 so we clear coresponding
    movf Step, W                       ; prescaler value bit
    movwf OPTION_REG
    movf INDF0 ,W                    ; test if TMR0 has changed
    xorwf TMR0_TEMP, W
    btfsc STATUS, Z ; equal
    goto NextBit
    movf INDF0 ,W                   ; from here .... clear PrescalerValue bit (W) 
    movwf TMR0_TEMP
    movf OPTION_REG, W
    andlw 0x07
    lslf WREG, F
    brw
    bcf PrescalerValue, 0
    goto NextBit
    bcf PrescalerValue, 1
    goto NextBit
    bcf PrescalerValue, 2
    goto NextBit
    bcf PrescalerValue, 3
    goto NextBit
    bcf PrescalerValue, 4
    goto NextBit
    bcf PrescalerValue, 5
    goto NextBit
    bcf PrescalerValue, 6
    goto NextBit
    bcf PrescalerValue, 7
NextBit
    incf Step, F
    btfss Step, 3                    ; greater than 7
    goto FinalScan_loop
    goto NextTestValue

 
1and0
blue_led
the code is grotesquely elongated by the BANKSEL instructions because OPTION_REG and TMR0 are in different banks

Use indirect register to access one of the two to avoid bank switching.

Sir, yes sir.
post edited by blue_led - 2021/02/27 19:48:12
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1and0
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Re: Reading TMR0 prescale value 2021/02/27 20:11:16 (permalink)
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blue_led
Not. TMR0SE is in front of the prescaller and I do not make any changes to this bit. I deal with the prescaller multiplexer and it is in front of TMR0, presenting different bits from the stages of the prescaller to the input of TMR0 it can be incremented or not. TMR0 like any n-stage digital counter counts on the negative edge of previous stage and MCHP does not bother to change this as it is not necessary.

T0CKI and TMR0SE are inputs of an XOR gate, and the output of this XOR gate goes to the input of the prescaler (1:2 to 1:256) or the input of TMR0 (1:1). The output of the prescaler can also go to the input of TMR0. That is, the "front" of TMR0 can be either the output or the input of the prescaler.

With TMR0SE = 0, Timer0 increments on low-to-high transition on T0CKI pin, meaning TMR0 increments on raising edge.  With TMR0SE = 1, Timer0 increments on high-to-low transition on T0CKI pin, which is the complement so it's still meaning TMR0 increments on raising edge.
 
blue_led
This is final loop. the rest of code is work in progress ..
FinalScan
    movlw 0x20         ; This avoid use 2 IORLW instruction later
    movwf Step
    movf INDF0 ,W
    movwf TMR0_TEMP
FinalScan_loop
    movf Shure_1_position ,W     ; we will test if there is an increment of TMR0
    movwf OPTION_REG             ; meaning the bit tested is 0 so we clear coresponding
    movf Step, W                       ; prescaler value bit
    movwf OPTION_REG
    movf INDF0 ,W                    ; test if TMR0 has changed
    xorwf TMR0_TEMP, W
    btfsc STATUS, Z ; equal
    goto NextBit
    movf INDF0 ,W                   ; from here .... clear PrescalerValue bit (W) 
    movwf TMR0_TEMP
    movf OPTION_REG, W
    andlw 0x07
    lslf WREG, F
    brw
    bcf PrescalerValue, 0
    goto NextBit
    bcf PrescalerValue, 1
    goto NextBit
    bcf PrescalerValue, 2
    goto NextBit
    bcf PrescalerValue, 3
    goto NextBit
    bcf PrescalerValue, 4
    goto NextBit
    bcf PrescalerValue, 5
    goto NextBit
    bcf PrescalerValue, 6
    goto NextBit
    bcf PrescalerValue, 7
NextBit
    incf Step, F
    btfss Step, 3                    ; greater than 7
    goto FinalScan_loop
    goto NextTestValue


I have a snippet comparable with the code in the link of my Post #14, but no setup to test it. :(
 
#18
blue_led
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Re: Reading TMR0 prescale value 2021/02/28 01:42:16 (permalink)
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1and0
T0CKI and TMR0SE are inputs of an XOR gate, and the output of this XOR gate goes to the input of the prescaler (1:2 to 1:256) or the input of TMR0 (1:1). The output of the prescaler can also go to the input of TMR0. That is, the "front" of TMR0 can be either the output or the input of the prescaler.

With TMR0SE = 0, Timer0 increments on low-to-high transition on T0CKI pin, meaning TMR0 increments on raising edge.  With TMR0SE = 1, Timer0 increments on high-to-low transition on T0CKI pin, which is the complement so it's still meaning TMR0 increments on raising edge.



Your statement is true but also my statement is true. I don't talk about routing T0CKI pin to TMR0 imput.
If logic gates after T0CKI pin make TMR0 count on rising edge, at least on PIC16F1769 prescaler count on falling edge   and TMR0 itself also count on falling edge of his very imput.
TMR0 increment after instruction 162 !! PORTC 0 pin drive PORTA 2 pin ( T0CKI )
So i think there is an hidden inverter not shown in TMR0 schematics.
post edited by blue_led - 2021/02/28 01:58:34

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1and0
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Re: Reading TMR0 prescale value 2021/02/28 03:27:16 (permalink)
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blue_led
Your statement is true but also my statement is true. I don't talk about routing T0CKI pin to TMR0 imput.
If logic gates after T0CKI pin make TMR0 count on rising edge, at least on PIC16F1769 prescaler count on falling edge   and TMR0 itself also count on falling edge of his very imput.
TMR0 increment after instruction 162 !! PORTC 0 pin drive PORTA 2 pin ( T0CKI )
So i think there is an hidden inverter not shown in TMR0 schematics.

I'll have to construct a setup and investigate this when I get some time. ;)
#20
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