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AnsweredHot!PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack

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KevinHuang
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2021/01/27 14:37:12 (permalink)
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PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack

Hi Experts,
 
I am using the PIC32MZ with the harmony V2_06, TCPIP UDP stack(not Berkeley API), and use the UDP to do the data TX and RX. One normal socket do TX and RX. Another two sockets join to a multicast PTP channel.
 
 
Now I found that if I do not process the UDP RX packages fast enough, the whole RX stack would crash.
Example, I sent 10-20 UDP packages from the PC to one of the UDP sockets(multicast PTP sockets) in 0.1 milliseconds, meanwhile the PIC32MZ was busy in a function
--- then the PIC32MZ will not process the received packages, and will be unable to receive UDP packages anymore(All sockets, only RX part)
---- Even the single normal socket now can't receive data; however, it can send packages out. 
 
 
How to locate and fix this problem?



 
Regards,
Kevin
 
// Only RX function, no any other UDP error/exception functions in the project. TX is not included at here.

uint16_t multi_recvfrom(UDP_SOCKET s, uint8_t * buf, uint16_t read_len)
{
    uint16_t multi_tmp_a, multi_tmp_b;
    multi_tmp_a = TCPIP_UDP_GetIsReady(s);
    multi_tmp_b = 0;
    if (multi_tmp_a > 0)
    {
        if (multi_tmp_a > (uint16_t)read_len)
            multi_tmp_a = (uint16_t)read_len;
        multi_tmp_b = TCPIP_UDP_ArrayGet(s, buf, multi_tmp_a);
    }
    TCPIP_UDP_Discard(s);
    return (multi_tmp_b);
}

 

// the multicast join function:

bool UDP_mcast_open(void)
{
    UDP_OPTION_MULTICAST_DATA Multicast_Options;
    Multicast_Options.flagsMask = UDP_MCAST_FLAG_DEFAULT;
    Multicast_Options.flagsValue = UDP_MCAST_FLAG_DEFAULT;
   
    if (appData.socket_PTP_319 != INVALID_SOCKET)
        TCPIP_UDP_Close(appData.socket_PTP_319);
    if (appData.socket_PTP_320 != INVALID_SOCKET)
        TCPIP_UDP_Close(appData.socket_PTP_320);
   
    IP_MULTI_ADDRESS appRemAddress;
    TCPIP_Helper_StringToIPAddress("224.0.1.129", &appRemAddress.v4Add);
    //319
    appData.socket_PTP_319 = TCPIP_UDP_ServerOpen(IP_ADDRESS_TYPE_IPV4, 319, 0);
    if(appData.socket_PTP_319 == INVALID_SOCKET)
    {
        TCPIP_UDP_Close(appData.socket_PTP_319);
        return false;
    }
    TCPIP_UDP_RemoteBind(appData.socket_PTP_319,
                                IP_ADDRESS_TYPE_IPV4,
                                319, // remote port
                                (IP_MULTI_ADDRESS*) &appRemAddress); // remote address
    TCPIP_UDP_OptionsSet(appData.socket_PTP_319, UDP_OPTION_MULTICAST, &Multicast_Options);// (void*) false);
    TCPIP_IGMP_Join(appData.socket_PTP_319, 0, appRemAddress.v4Add);

    //320
    appData.socket_PTP_320 = TCPIP_UDP_ServerOpen(IP_ADDRESS_TYPE_IPV4, 320, 0);
    if(appData.socket_PTP_320 == INVALID_SOCKET)
    {
        TCPIP_UDP_Close(appData.socket_PTP_319);
        TCPIP_UDP_Close(appData.socket_PTP_320);
        return false;
    }
    TCPIP_UDP_RemoteBind(appData.socket_PTP_320,
                                IP_ADDRESS_TYPE_IPV4,
                                320, // remote port
                                (IP_MULTI_ADDRESS*) &appRemAddress); // remote address
    TCPIP_UDP_OptionsSet(appData.socket_PTP_320, UDP_OPTION_MULTICAST, &Multicast_Options);// (void*) false);
    TCPIP_IGMP_Join(appData.socket_PTP_320, 0, appRemAddress.v4Add);
   
   return true;
}

post edited by KevinHuang - 2021/01/27 15:09:37
#1
rainad
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/28 11:19:55 (permalink)
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Probably what you're describing is the normal/intended behavior.
  • You cannot just stay in a loop for a long time without servicing the TCP/IP stack
    • This violates the Harmony design rules.
    • You need to do what you need to do and return, allowing the other modules/systems do their job.
    • That is unless you run in an RTOS environment and you make sure that the task switching occurs anyway, allowing the other modules to run.
  • The UDP sockets use the RX buffers directly from the MAC driver (to avoid copies, etc.)
    • This means that if you do not process the incoming packets and they start to queue up, you'll starve the MAC driver and other sockets of RX buffers
    • To avoid this starvation, there is a limit for a UDP socket: UDP_OPTION_RX_QUEUE_LIMIT (default value 3) that sets the max limit of packets that a socket can queue up. Once that limit is reached, no more packets for that socket.
I assume that's what's happening.
You can enable the UDP commands and then 'udpinfo' from the console will show you how many packets are queued for each socket. Or you can check this at run time.
 
 
    
#2
KevinHuang
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/28 11:50:42 (permalink)
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rainad
Probably what you're describing is the normal/intended behavior.
  • You cannot just stay in a loop for a long time without servicing the TCP/IP stack
    • This violates the Harmony design rules.
    • You need to do what you need to do and return, allowing the other modules/systems do their job.
    • That is unless you run in an RTOS environment and you make sure that the task switching occurs anyway, allowing the other modules to run.
  • The UDP sockets use the RX buffers directly from the MAC driver (to avoid copies, etc.)
    • This means that if you do not process the incoming packets and they start to queue up, you'll starve the MAC driver and other sockets of RX buffers
    • To avoid this starvation, there is a limit for a UDP socket: UDP_OPTION_RX_QUEUE_LIMIT (default value 3) that sets the max limit of packets that a socket can queue up. Once that limit is reached, no more packets for that socket.
I assume that's what's happening.
You can enable the UDP commands and then 'udpinfo' from the console will show you how many packets are queued for each socket. Or you can check this at run time.
 
 
    


Hi Rainad,
 
Thanks for the response. The documents mentioned if the RX queue limit was reached, all following packets would be omitted. What I though was, if I came back and clear the queue, the RX should still work (just missed some packets I didn't process in time). But now the problem is, the whole RX function is gone, and I don't know how to recover it.
 
Regards,
Kevin
#3
KevinHuang
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/28 13:27:03 (permalink)
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Here is my system_config.h file:
// DOM-IGNORE-END

#ifndef _SYSTEM_CONFIG_H
#define _SYSTEM_CONFIG_H

// *****************************************************************************
// *****************************************************************************
// Section: Included Files
// *****************************************************************************
// *****************************************************************************
/* This section Includes other configuration headers necessary to completely
    define this configuration.
*/


// DOM-IGNORE-BEGIN
#ifdef __cplusplus // Provide C++ Compatibility

extern "C" {

#endif
// DOM-IGNORE-END
#include <stdint.h>
// *****************************************************************************
// *****************************************************************************
// Section: System Service Configuration
// *****************************************************************************
// *****************************************************************************
// *****************************************************************************
/* Common System Service Configuration Options
*/
#define SYS_VERSION_STR "2.06"
#define SYS_VERSION 20600

// *****************************************************************************
/* Clock System Service Configuration Options
*/
#define SYS_CLK_FREQ 200000000ul
#define SYS_CLK_BUS_PERIPHERAL_1 100000000ul
#define SYS_CLK_BUS_PERIPHERAL_2 66666666ul
#define SYS_CLK_BUS_PERIPHERAL_3 100000000ul
#define SYS_CLK_BUS_PERIPHERAL_4 100000000ul
#define SYS_CLK_BUS_PERIPHERAL_5 100000000ul
#define SYS_CLK_BUS_PERIPHERAL_7 200000000ul
#define SYS_CLK_BUS_PERIPHERAL_8 100000000ul
#define SYS_CLK_BUS_REFERENCE_1 80000000ul
#define SYS_CLK_CONFIG_PRIMARY_XTAL 24000000ul
#define SYS_CLK_CONFIG_SECONDARY_XTAL 32768ul
   
/*** Ports System Service Configuration ***/
#define SYS_PORT_A_ANSEL 0x3F20
#define SYS_PORT_A_TRIS 0xFFBF
#define SYS_PORT_A_LAT 0x0000
#define SYS_PORT_A_ODC 0x0000
#define SYS_PORT_A_CNPU 0x0000
#define SYS_PORT_A_CNPD 0x0000
#define SYS_PORT_A_CNEN 0x0000

#define SYS_PORT_B_ANSEL 0x0DDD
#define SYS_PORT_B_TRIS 0xFFFF
#define SYS_PORT_B_LAT 0x0000
#define SYS_PORT_B_ODC 0x0000
#define SYS_PORT_B_CNPU 0x7000
#define SYS_PORT_B_CNPD 0x0000
#define SYS_PORT_B_CNEN 0x0000

#define SYS_PORT_C_ANSEL 0xEFF1
#define SYS_PORT_C_TRIS 0xFFFB
#define SYS_PORT_C_LAT 0x0004
#define SYS_PORT_C_ODC 0x0000
#define SYS_PORT_C_CNPU 0x0000
#define SYS_PORT_C_CNPD 0x0000
#define SYS_PORT_C_CNEN 0x0000

#define SYS_PORT_D_ANSEL 0x0100
#define SYS_PORT_D_TRIS 0xFDFE
#define SYS_PORT_D_LAT 0x0200
#define SYS_PORT_D_ODC 0x0000
#define SYS_PORT_D_CNPU 0x0000
#define SYS_PORT_D_CNPD 0x0000
#define SYS_PORT_D_CNEN 0x0000

#define SYS_PORT_E_ANSEL 0xFCD0
#define SYS_PORT_E_TRIS 0xFFFF
#define SYS_PORT_E_LAT 0x0000
#define SYS_PORT_E_ODC 0x0000
#define SYS_PORT_E_CNPU 0x0000
#define SYS_PORT_E_CNPD 0x0000
#define SYS_PORT_E_CNEN 0x0000

#define SYS_PORT_F_ANSEL 0xCEC0
#define SYS_PORT_F_TRIS 0xFFFD
#define SYS_PORT_F_LAT 0x0000
#define SYS_PORT_F_ODC 0x0000
#define SYS_PORT_F_CNPU 0x0000
#define SYS_PORT_F_CNPD 0x0000
#define SYS_PORT_F_CNEN 0x0000

#define SYS_PORT_G_ANSEL 0x8E3C
#define SYS_PORT_G_TRIS 0xFFFD
#define SYS_PORT_G_LAT 0x0000
#define SYS_PORT_G_ODC 0x0000
#define SYS_PORT_G_CNPU 0x0000
#define SYS_PORT_G_CNPD 0x0000
#define SYS_PORT_G_CNEN 0x0000

#define SYS_PORT_H_ANSEL 0x0040
#define SYS_PORT_H_TRIS 0x7FF8
#define SYS_PORT_H_LAT 0x0000
#define SYS_PORT_H_ODC 0x0000
#define SYS_PORT_H_CNPU 0x0000
#define SYS_PORT_H_CNPD 0x0000
#define SYS_PORT_H_CNEN 0x0000

#define SYS_PORT_J_ANSEL 0x0000
#define SYS_PORT_J_TRIS 0xFFAF
#define SYS_PORT_J_LAT 0x0000
#define SYS_PORT_J_ODC 0x0000
#define SYS_PORT_J_CNPU 0x0000
#define SYS_PORT_J_CNPD 0x0000
#define SYS_PORT_J_CNEN 0x0000

#define SYS_PORT_K_ANSEL 0xFF00
#define SYS_PORT_K_TRIS 0xFFFF
#define SYS_PORT_K_LAT 0x0000
#define SYS_PORT_K_ODC 0x0000
#define SYS_PORT_K_CNPU 0x0000
#define SYS_PORT_K_CNPD 0x0000
#define SYS_PORT_K_CNEN 0x0000


/*** Interrupt System Service Configuration ***/
#define SYS_INT true
// *****************************************************************************
/* Random System Service Configuration Options
*/

#define SYS_RANDOM_CRYPTO_SEED_SIZE 32

/*** Timer System Service Configuration ***/
#define SYS_TMR_POWER_STATE SYS_MODULE_POWER_RUN_FULL
#define SYS_TMR_DRIVER_INDEX DRV_TMR_INDEX_0
#define SYS_TMR_MAX_CLIENT_OBJECTS 5
#define SYS_TMR_FREQUENCY 1000
#define SYS_TMR_FREQUENCY_TOLERANCE 10
#define SYS_TMR_UNIT_RESOLUTION 10000
#define SYS_TMR_CLIENT_TOLERANCE 10
#define SYS_TMR_INTERRUPT_NOTIFICATION false

// *****************************************************************************
// *****************************************************************************
// Section: Driver Configuration
// *****************************************************************************
// *****************************************************************************

/*** MIIM Driver Configuration ***/
#define DRV_MIIM_ETH_MODULE_ID ETH_ID_0
#define DRV_MIIM_INSTANCES_NUMBER 1
#define DRV_MIIM_INSTANCE_OPERATIONS 4
#define DRV_MIIM_INSTANCE_CLIENTS 2
#define DRV_MIIM_CLIENT_OP_PROTECTION false
#define DRV_MIIM_COMMANDS false
#define DRV_MIIM_DRIVER_OBJECT DRV_MIIM_OBJECT_BASE_Default
#define DRV_MIIM_DRIVER_INDEX DRV_MIIM_INDEX_0
/*** Timer Driver Configuration ***/
#define DRV_TMR_INTERRUPT_MODE true
#define DRV_TMR_INSTANCES_NUMBER 1
#define DRV_TMR_CLIENTS_NUMBER 1

/*** Timer Driver 0 Configuration ***/
#define DRV_TMR_PERIPHERAL_ID_IDX0 TMR_ID_2
#define DRV_TMR_INTERRUPT_SOURCE_IDX0 INT_SOURCE_TIMER_2
#define DRV_TMR_INTERRUPT_VECTOR_IDX0 INT_VECTOR_T2
#define DRV_TMR_ISR_VECTOR_IDX0 _TIMER_2_VECTOR
#define DRV_TMR_INTERRUPT_PRIORITY_IDX0 INT_PRIORITY_LEVEL4
#define DRV_TMR_INTERRUPT_SUB_PRIORITY_IDX0 INT_SUBPRIORITY_LEVEL0
#define DRV_TMR_CLOCK_SOURCE_IDX0 DRV_TMR_CLKSOURCE_INTERNAL
#define DRV_TMR_PRESCALE_IDX0 TMR_PRESCALE_VALUE_256
#define DRV_TMR_OPERATION_MODE_IDX0 DRV_TMR_OPERATION_MODE_16_BIT
#define DRV_TMR_ASYNC_WRITE_ENABLE_IDX0 false
#define DRV_TMR_POWER_STATE_IDX0 SYS_MODULE_POWER_RUN_FULL


 
// *****************************************************************************
// *****************************************************************************
// Section: Middleware & Other Library Configuration
// *****************************************************************************
// *****************************************************************************


// *****************************************************************************
// *****************************************************************************
// Section: TCPIP Stack Configuration
// *****************************************************************************
// *****************************************************************************
#define TCPIP_STACK_USE_IPV4
#define TCPIP_STACK_USE_TCP
#define TCPIP_STACK_USE_UDP

#define TCPIP_STACK_TICK_RATE 5
#define TCPIP_STACK_SECURE_PORT_ENTRIES 10

#define TCPIP_STACK_ALIAS_INTERFACE_SUPPORT false

#define TCPIP_PACKET_LOG_ENABLE 0

/* TCP/IP stack event notification */
#define TCPIP_STACK_USE_EVENT_NOTIFICATION
#define TCPIP_STACK_USER_NOTIFICATION false
#define TCPIP_STACK_DOWN_OPERATION true
#define TCPIP_STACK_IF_UP_DOWN_OPERATION true
#define TCPIP_STACK_MAC_DOWN_OPERATION true
#define TCPIP_STACK_INTERFACE_CHANGE_SIGNALING false
#define TCPIP_STACK_CONFIGURATION_SAVE_RESTORE true
/*** TCPIP Heap Configuration ***/

#define TCPIP_STACK_USE_INTERNAL_HEAP
#define TCPIP_STACK_DRAM_SIZE 39250
#define TCPIP_STACK_DRAM_RUN_LIMIT 2048

#define TCPIP_STACK_MALLOC_FUNC malloc

#define TCPIP_STACK_CALLOC_FUNC calloc

#define TCPIP_STACK_FREE_FUNC free



#define TCPIP_STACK_HEAP_USE_FLAGS TCPIP_STACK_HEAP_FLAG_ALLOC_UNCACHED

#define TCPIP_STACK_HEAP_USAGE_CONFIG TCPIP_STACK_HEAP_USE_DEFAULT

#define TCPIP_STACK_SUPPORTED_HEAPS 1

/*** ARP Configuration ***/
#define TCPIP_ARP_CACHE_ENTRIES 5
#define TCPIP_ARP_CACHE_DELETE_OLD true
#define TCPIP_ARP_CACHE_SOLVED_ENTRY_TMO 1200
#define TCPIP_ARP_CACHE_PENDING_ENTRY_TMO 60
#define TCPIP_ARP_CACHE_PENDING_RETRY_TMO 2
#define TCPIP_ARP_CACHE_PERMANENT_QUOTA 50
#define TCPIP_ARP_CACHE_PURGE_THRESHOLD 75
#define TCPIP_ARP_CACHE_PURGE_QUANTA 1
#define TCPIP_ARP_CACHE_ENTRY_RETRIES 3
#define TCPIP_ARP_GRATUITOUS_PROBE_COUNT 1
#define TCPIP_ARP_TASK_PROCESS_RATE 2
#define TCPIP_ARP_PRIMARY_CACHE_ONLY true


/*** DNS Client Configuration ***/
#define TCPIP_STACK_USE_DNS
#define TCPIP_DNS_CLIENT_SERVER_TMO 60
#define TCPIP_DNS_CLIENT_TASK_PROCESS_RATE 200
#define TCPIP_DNS_CLIENT_CACHE_ENTRIES 5
#define TCPIP_DNS_CLIENT_CACHE_ENTRY_TMO 0
#define TCPIP_DNS_CLIENT_CACHE_PER_IPV4_ADDRESS 5
#define TCPIP_DNS_CLIENT_CACHE_PER_IPV6_ADDRESS 1
#define TCPIP_DNS_CLIENT_ADDRESS_TYPE IP_ADDRESS_TYPE_IPV4
#define TCPIP_DNS_CLIENT_CACHE_DEFAULT_TTL_VAL 1200
#define TCPIP_DNS_CLIENT_CACHE_UNSOLVED_ENTRY_TMO 10
#define TCPIP_DNS_CLIENT_LOOKUP_RETRY_TMO 5
#define TCPIP_DNS_CLIENT_MAX_HOSTNAME_LEN 32
#define TCPIP_DNS_CLIENT_MAX_SELECT_INTERFACES 4
#define TCPIP_DNS_CLIENT_DELETE_OLD_ENTRIES true
#define TCPIP_DNS_CLIENT_USER_NOTIFICATION false




/*** ICMPv4 Server Configuration ***/
#define TCPIP_STACK_USE_ICMP_SERVER
#define TCPIP_ICMP_ECHO_ALLOW_BROADCASTS false



/*** NBNS Configuration ***/
#define TCPIP_STACK_USE_NBNS
#define TCPIP_NBNS_TASK_TICK_RATE 110







/*** TCP Configuration ***/
#define TCPIP_TCP_MAX_SEG_SIZE_TX 1460
#define TCPIP_TCP_SOCKET_DEFAULT_TX_SIZE 512
#define TCPIP_TCP_SOCKET_DEFAULT_RX_SIZE 512
#define TCPIP_TCP_DYNAMIC_OPTIONS true
#define TCPIP_TCP_START_TIMEOUT_VAL 1000
#define TCPIP_TCP_DELAYED_ACK_TIMEOUT 100
#define TCPIP_TCP_FIN_WAIT_2_TIMEOUT 5000
#define TCPIP_TCP_KEEP_ALIVE_TIMEOUT 10000
#define TCPIP_TCP_CLOSE_WAIT_TIMEOUT 0
#define TCPIP_TCP_MAX_RETRIES 5
#define TCPIP_TCP_MAX_UNACKED_KEEP_ALIVES 6
#define TCPIP_TCP_MAX_SYN_RETRIES 3
#define TCPIP_TCP_AUTO_TRANSMIT_TIMEOUT_VAL 40
#define TCPIP_TCP_WINDOW_UPDATE_TIMEOUT_VAL 200
#define TCPIP_TCP_MAX_SOCKETS 10
#define TCPIP_TCP_TASK_TICK_RATE 5
#define TCPIP_TCP_MSL_TIMEOUT 30
#define TCPIP_TCP_QUIET_TIME 0
#define TCPIP_TCP_COMMANDS false

/*** announce Configuration ***/
#define TCPIP_STACK_USE_ANNOUNCE
#define TCPIP_ANNOUNCE_MAX_PAYLOAD 512
#define TCPIP_ANNOUNCE_TASK_RATE 333
#define TCPIP_ANNOUNCE_NETWORK_DIRECTED_BCAST false

/*** TCPIP MAC Configuration ***/
#define TCPIP_EMAC_TX_DESCRIPTORS 8
#define TCPIP_EMAC_RX_DESCRIPTORS 6
#define TCPIP_EMAC_RX_DEDICATED_BUFFERS 4
#define TCPIP_EMAC_RX_INIT_BUFFERS 0
#define TCPIP_EMAC_RX_LOW_THRESHOLD 1
#define TCPIP_EMAC_RX_LOW_FILL 2
#define TCPIP_EMAC_MAX_FRAME 1536
#define TCPIP_EMAC_LINK_MTU 1500
#define TCPIP_EMAC_RX_BUFF_SIZE 5120
#define TCPIP_EMAC_RX_FRAGMENTS 1

#define TCPIP_EMAC_RX_FILTERS \
                                                    TCPIP_MAC_RX_FILTER_TYPE_BCAST_ACCEPT |\
                                                    TCPIP_MAC_RX_FILTER_TYPE_MCAST_ACCEPT |\
                                                    TCPIP_MAC_RX_FILTER_TYPE_UCAST_ACCEPT |\
                                                    TCPIP_MAC_RX_FILTER_TYPE_RUNT_REJECT |\
                                                    TCPIP_MAC_RX_FILTER_TYPE_CRC_ERROR_REJECT |\
                                                    0
#define TCPIP_EMAC_ETH_OPEN_FLAGS \
                                                    TCPIP_ETH_OPEN_AUTO |\
                                                    TCPIP_ETH_OPEN_FDUPLEX |\
                                                    TCPIP_ETH_OPEN_HDUPLEX |\
                                                    TCPIP_ETH_OPEN_100 |\
                                                    TCPIP_ETH_OPEN_10 |\
                                                    TCPIP_ETH_OPEN_MDIX_AUTO |\
                                                    TCPIP_ETH_OPEN_RMII |\
                                                    0

#define TCPIP_EMAC_MODULE_ID ETH_ID_0
#define TCPIP_EMAC_INTERRUPT_MODE true
#define DRV_ETHMAC_INSTANCES_NUMBER 1
#define DRV_ETHMAC_CLIENTS_NUMBER 1
#define DRV_ETHMAC_INDEX 1
#define DRV_ETHMAC_PERIPHERAL_ID 1
#define DRV_ETHMAC_INTERRUPT_VECTOR INT_VECTOR_ETHERNET
#define DRV_ETHMAC_INTERRUPT_SOURCE INT_SOURCE_ETH_1
#define DRV_ETHMAC_POWER_STATE SYS_MODULE_POWER_RUN_FULL

#define DRV_ETHMAC_INTERRUPT_MODE true


#define TCPIP_EMAC_PHY_CONFIG_FLAGS \
                                                    DRV_ETHPHY_CFG_RMII | \
                                                    DRV_ETHPHY_CFG_AUTO | \
                                                    0

#define TCPIP_EMAC_PHY_LINK_INIT_DELAY 500
#define TCPIP_EMAC_PHY_ADDRESS 0
#define DRV_ETHPHY_INSTANCES_NUMBER 1
#define DRV_ETHPHY_CLIENTS_NUMBER 1
#define DRV_ETHPHY_INDEX 1
#define DRV_ETHPHY_PERIPHERAL_ID 1
#define DRV_ETHPHY_NEG_INIT_TMO 1
#define DRV_ETHPHY_NEG_DONE_TMO 2000
#define DRV_ETHPHY_RESET_CLR_TMO 500
#define DRV_ETHPHY_USE_DRV_MIIM true
#define TCPIP_EMAC_AUTO_FLOW_CONTROL_ENABLE true
#define TCPIP_EMAC_FLOW_CONTROL_PAUSE_BYTES 5120
#define TCPIP_EMAC_FLOW_CONTROL_FULL_WMARK 20
#define TCPIP_EMAC_FLOW_CONTROL_EMPTY_WMARK 0



/*** UDP Configuration ***/
#define TCPIP_UDP_MAX_SOCKETS 10
#define TCPIP_UDP_SOCKET_DEFAULT_TX_SIZE 1024
#define TCPIP_UDP_SOCKET_DEFAULT_TX_QUEUE_LIMIT 3
#define TCPIP_UDP_SOCKET_DEFAULT_RX_QUEUE_LIMIT 20
#define TCPIP_UDP_USE_POOL_BUFFERS false
#define TCPIP_UDP_USE_TX_CHECKSUM true
#define TCPIP_UDP_USE_RX_CHECKSUM true
#define TCPIP_UDP_COMMANDS false

#define TCPIP_STACK_USE_ZEROCONF_LINK_LOCAL
#define TCPIP_ZC_LL_PROBE_WAIT 1
#define TCPIP_ZC_LL_PROBE_MIN 1
#define TCPIP_ZC_LL_PROBE_MAX 2
#define TCPIP_ZC_LL_PROBE_NUM 3
#define TCPIP_ZC_LL_ANNOUNCE_WAIT 2
#define TCPIP_ZC_LL_ANNOUNCE_NUM 2
#define TCPIP_ZC_LL_ANNOUNCE_INTERVAL 2
#define TCPIP_ZC_LL_MAX_CONFLICTS 10
#define TCPIP_ZC_LL_RATE_LIMIT_INTERVAL 60
#define TCPIP_ZC_LL_DEFEND_INTERVAL 10
#define TCPIP_ZC_LL_IPV4_LLBASE 0xa9fe0100
#define TCPIP_ZC_LL_IPV4_LLBASE_MASK 0x0000FFFF
#define TCPIP_ZC_LL_TASK_TICK_RATE 333



/*** IPv4 Configuration ***/

/*** IGMP Configuration ***/
#define TCPIP_STACK_USE_IGMP
#define TCPIP_IGMP_INTERFACES 1
#define TCPIP_IGMP_MCAST_GROUPS 7
#define TCPIP_IGMPV2_SUPPORT_ONLY false
#define TCPIP_IGMP_SOURCES_PER_GROUP 11
#define TCPIP_IGMP_SOCKET_RECORDS_PER_SOURCE 4
#define TCPIP_IGMP_ROBUSTNESS_VARIABLE 2
#define TCPIP_IGMP_UNSOLICITED_REPORT_INTERVAL 1000
#define TCPIP_IGMP_USER_NOTIFICATION false
#define TCPIP_IGMP_TASK_TICK_RATE 33
/*** Network Configuration Index 0 ***/
// DO NOT change the following block::
//////// Begin BLOCK ///////////
#define TCPIP_IF_PIC32INT
#define TCPIP_NETWORK_DEFAULT_POWER_MODE_IDX0 "full"
#define TCPIP_NETWORK_DEFAULT_INTERFACE_NAME_IDX0 "PIC32INT"
#define TCPIP_NETWORK_DEFAULT_HOST_NAME_IDX0 "OCULII_V0"

    
char TCPIP_NETWORK_DEFAULT_IP_MASK_IDX0[16]; // IPNVMAddr_Write (0x1D100000)4 bytes
uint8_t TCPIP_NETWORK_mask_b[4];
char TCPIP_NETWORK_DEFAULT_GATEWAY_IDX0[16]; // IPNVMAddr_Write (0x1D100004) 4 bytes
uint8_t TCPIP_NETWORK_gateway_b[4];
char TCPIP_NETWORK_DEFAULT_DNS_IDX0[16]; // IPNVMAddr_Write (0x1D100008) 4 bytes
uint8_t TCPIP_NETWORK_dns_b[4];
char TCPIP_NETWORK_DEFAULT_SECOND_DNS_IDX0[16]; // IPNVMAddr_Write (0x1D10000C) 4 bytes
uint8_t TCPIP_NETWORK_second_dns_b[4];
char TCPIP_NETWORK_DEFAULT_IP_ADDRESS_IDX0[16]; // IPNVMAddr_Write (0x1D100010) 4 bytes
uint8_t TCPIP_NETWORK_ip_addr_b[4];

uint8_t TCPIP_NETWORK_clientaddr_b[4]; // IPNVMAddr_Write (0x1D1000014) 4 bytes
uint16_t PC_CLIENT_PORT; // IPNVMAddr_Write (0x1D1000018) 2 byte
uint16_t MCU_SERVER_PORT; // IPNVMAddr_Write (0x1D100001C) 2 byte

char TCPIP_NETWORK_DEFAULT_MAC_ADDR_IDX0[18]; // IPNVMAddr_Write (0x1D1000020) 6 bytes
uint8_t TCPIP_NETWORK_mac_addr_b[6];
//////// END BLOCK ///////////
    
    


#define TCPIP_NETWORK_DEFAULT_INTERFACE_FLAGS_IDX0 \
             TCPIP_NETWORK_CONFIG_DNS_CLIENT_ON |\
             TCPIP_NETWORK_CONFIG_MULTICAST_ON |\
             TCPIP_NETWORK_CONFIG_IP_STATIC
#define TCPIP_NETWORK_DEFAULT_MAC_DRIVER_IDX0 DRV_ETHMAC_PIC32MACObject
#define TCPIP_NETWORK_DEFAULT_IPV6_ADDRESS_IDX0 0
#define TCPIP_NETWORK_DEFAULT_IPV6_PREFIX_LENGTH_IDX0 0
#define TCPIP_NETWORK_DEFAULT_IPV6_GATEWAY_IDX0 0


// *****************************************************************************
// *****************************************************************************
// Section: Application Configuration
// *****************************************************************************
// *****************************************************************************
/*** Application Defined Pins ***/


/*** Application Instance 0 Configuration ***/

//DOM-IGNORE-BEGIN
#ifdef __cplusplus
}
#endif
//DOM-IGNORE-END

#endif // _SYSTEM_CONFIG_H
/*******************************************************************************
 End of File
*/

 
 
#4
rainad
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/28 13:33:47 (permalink) ☄ Helpfulby KevinHuang 2021/01/28 13:56:15
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You have
TCPIP_UDP_SOCKET_DEFAULT_RX_QUEUE_LIMIT == 20
which is way more than
TCPIP_EMAC_RX_DESCRIPTORS == 6.
So that UDP socket will grab all the available packets, starving everybody else.
Plus I see:
TCPIP_EMAC_RX_BUFF_SIZE == 5120 ???
Why do you need so big buffers? The MTU is still 1500 and MAX_FRAME 1536. You're just wasting space.
Please reconfigure your project using the default values and then it will work.
 
 
#5
KevinHuang
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/28 14:00:34 (permalink)
0
Hi rainad,
 
I appreciate your suggestions.
If the same problem happens with the default setting, is there any method to recover from the "starvation"? (clear buffer, clear error flags, and so on)
 
Bests,
Kevin
#6
rainad
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/28 14:43:26 (permalink) ☄ Helpfulby KevinHuang 2021/01/28 14:46:13
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Even if you don't consume the UDP socket data and the queued packets reach the limit, once the socket processes the packets it will receive new data. It should recover nicely, no lock up should occur.
Of course you need to make sure that you still have some run-time memory available.
Use 'heapinfo' command at the console and check the output.
 
#7
KevinHuang
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/28 15:14:35 (permalink)
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Hi rainad,
 
Thanks.
I'm thinking to increase the RX buffer and the RX_QUEUE_LIMIT.
Do you think the following modifications are fine?
For my project, both TX and RX packets are limited to 256 bytes per payload.
For the multicast PTP channel, which is out of my control, so I wish to buffer as many packets as possible to filter out what I need.
 
Best regards,
Kevin
 
--------------------------------------
 
#define TCPIP_STACK_DRAM_SIZE                       39250
#define TCPIP_EMAC_TX_DESCRIPTORS             8
#define TCPIP_EMAC_RX_DESCRIPTORS             26
#define TCPIP_EMAC_RX_DEDICATED_BUFFERS  20               ----- 20 x 512 = 10240, less than 39250
#define TCPIP_EMAC_MAX_FRAME                     1536
#define TCPIP_EMAC_LINK_MTU                        1500
#define TCPIP_EMAC_RX_BUFF_SIZE                 512
 
#define TCPIP_UDP_MAX_SOCKETS                                          10
#define TCPIP_UDP_SOCKET_DEFAULT_TX_SIZE                        512
#define TCPIP_UDP_SOCKET_DEFAULT_TX_QUEUE_LIMIT           3
#define TCPIP_UDP_SOCKET_DEFAULT_RX_QUEUE_LIMIT           18
 
#define TCPIP_EMAC_FLOW_CONTROL_FULL_WMARK         10    --- default is 2, which will create lots of spine-tree info
#define TCPIP_EMAC_FLOW_CONTROL_EMPTY_WMARK       0
post edited by KevinHuang - 2021/01/28 15:16:24
#8
rainad
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/28 18:46:05 (permalink)
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If you are sure that the packets in your network are <= 512 bytes, then sure, you can shrink down the size of the RX buffers.
You should also increase the TCP/IP heap size, there's plenty of memory on PIC32MZ.
UDP RX queue limit == 18 seems excessive.
Is such heavy processing on UDP data that it cannot keep up?
Something might be wrong.
 
#9
KevinHuang
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/28 19:30:32 (permalink)
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Overall for the UDP there is no heavy processing on average, but in short time it may have more than 10 packets(RX) on the PTP multicast group. It's a little bit complex to modify the code to break down some tasks(around 2-5 ms) into small pieces, that's why I would like to allocate more resources to buffer the RX packets.
For UDP RX queue limit == 18, what's the TCP_IP heap size you recommend?
 
Thanks a lot.
 
-- Kevin
#10
rainad
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/29 08:27:18 (permalink)
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So you need to be able to store 18 packets X packet_size + some other packets to not starve completely the MAC + some reserve memory ( at least 5KB I'd say, to be safe).
 
There should be enough memory on PIC32MZ to handle this. How much RAM do you currently use?
 
 
#11
KevinHuang
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/29 09:13:29 (permalink)
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From the project dashboard, I used 85% of the RAM(a big RAM reserved for files processing), and 76,376 bytes are unused.  --- Here I'm not sure the TCPIP EMAC heap is in the 85%, or the heap will in the 76,376 bytes.
 
Also the  
#define TCPIP_UDP_SOCKET_DEFAULT_RX_QUEUE_LIMIT           18
is it for each sockets (total 18 x number of sockets), or all sockets share the 18?
 
Regards,
--- Kevin
#12
rainad
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/29 11:12:44 (permalink) ☼ Best Answerby KevinHuang 2021/01/29 11:56:43
0
  • #define TCPIP_UDP_SOCKET_DEFAULT_RX_QUEUE_LIMIT           18
    • That applies to all UDP sockets and usually it's not a good idea
    • Much better to leave this value as default (==3) and do this only for the socket you're interested in with TCPIP_UDP_OptionsSet(skt, UDP_OPTION_RX_QUEUE_LIMIT, (void*)18);
  • The TCP/IP stack heap is taken from the project heap- defined under the linker. Increase both if you have 76 K unused.
 
 
#13
KevinHuang
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/29 11:56:41 (permalink)
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Thanks rainad,
 
So far the new program with the new setting is working properly. I believe this is the right direction.
I appreciate your helps!
 
Best regards,
Kevin
#14
KevinHuang
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/01/29 13:45:11 (permalink)
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Just mention what may be helpful to others:
Previously, I tried to increase the heap
         #define TCPIP_STACK_DRAM_SIZE                       46930
The TCPIP stack did not work at all. 
I set it back to default value and it works:
         #define TCPIP_STACK_DRAM_SIZE                       39250

Based on my testing/observation, the heap is a dynamic one(as document mentioned), which is not included in the project's dashboard(85% in my case)  -- e.g., I set it to 2000,000, the project still can be compiled, and the 85% is still 85%.


Regards,
--- Kevin
#15
rainad
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Re: PIC32MZ Ethernet Receiving jammed with Harmony V2.06, TCPIP UDP stack 2021/02/03 08:52:08 (permalink)
4 (1)
KevinHuang
Previously, I tried to increase the heap
       #define TCPIP_STACK_DRAM_SIZE                       46930
The TCPIP stack did not work at all. 



Probably you don't have enough heap in the project (where the TCP/IP heap is created from)?
Increasing the stack heap would only help, not making it fail immediately.
 
#16
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