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High Speed PWM MCC generated code not working (PIC24EP...MC)

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PragmaLab
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2021/01/22 03:21:43 (permalink)
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High Speed PWM MCC generated code not working (PIC24EP...MC)

Hi all,
 
I've been trying to get the high speed PWM module working on a PIC24EP256MC202 and a PIC24EP256MC204, with no succes. Seems pretty straight forward: tell the MCC what the PWM should do (just generate a PWM signal on RB14/RB15) with all fancy stuff disabled (no fault control, no interrupts, etc). Below is what the MCC generates (PWM and IO) and after inspection of these register values they seem OK. Still, RB14/RB15 refuse to output a PWM signal. They do work properly when configured as normal outputs. RB14/15 are assigned to the first PWM generator whereby RB14 is PWM1H and RB15 is PWM1L
 
PWM Init:
void PWM_Initialize(void)
{
// PCLKDIV 16;
PTCON2 = 0x04;
// PTPER 255;
PTPER = 0xFF;
// SEVTCMP 0;
SEVTCMP = 0x00;
// MDC 64;
MDC = 0x40;
// CHOPCLK 0; CHPCLKEN disabled;
CHOP = 0x00;
// PWMKEY 0;
PWMKEY = 0x00;
// MDCS Master; FLTIEN disabled; CAM Edge Aligned; DTC Dead-time function is disabled; TRGIEN disabled; XPRES disabled; ITB Master; IUE disabled; CLIEN disabled; MTBS disabled; DTCP disabled;
PWMCON1 = 0x180;
// MDCS Master; FLTIEN disabled; CAM Edge Aligned; DTC Positive dead time for all Output modes; TRGIEN disabled; XPRES disabled; ITB Master; IUE disabled; CLIEN disabled; MTBS disabled; DTCP disabled;
PWMCON2 = 0x100;
// MDCS Master; FLTIEN disabled; CAM Edge Aligned; DTC Positive dead time for all Output modes; TRGIEN disabled; XPRES disabled; ITB Master; IUE disabled; CLIEN disabled; MTBS disabled; DTCP disabled;
PWMCON3 = 0x100;
//FLTDAT PWM1L Low, PWM1H Low; SWAP disabled; OVRENH disabled; PENL enabled; PMOD Complementary Output Mode; OVRENL disabled; OSYNC disabled; POLL disabled; PENH enabled; CLDAT PWM1L Low, PWM1H Low; OVRDAT PWM1L Low, PWM1H Low; POLH disabled;
__builtin_write_PWMSFR(&IOCON1, 0xC000, &PWMKEY);
//FLTDAT PWM2L Low, PWM2H Low; SWAP disabled; OVRENH disabled; PENL disabled; PMOD Complementary Output Mode; OVRENL disabled; OSYNC disabled; POLL disabled; PENH disabled; CLDAT PWM2L Low, PWM2H Low; OVRDAT PWM2L Low, PWM2H Low; POLH disabled;
__builtin_write_PWMSFR(&IOCON2, 0x00, &PWMKEY);
//FLTDAT PWM3L Low, PWM3H Low; SWAP disabled; OVRENH disabled; PENL disabled; PMOD Push-Pull Output Mode; OVRENL disabled; OSYNC disabled; POLL disabled; PENH disabled; CLDAT PWM3L Low, PWM3H Low; OVRDAT PWM3L High, PWM3H High; POLH disabled;
__builtin_write_PWMSFR(&IOCON3, 0x8C0, &PWMKEY);
//FLTPOL disabled; CLPOL disabled; CLSRC FLT1; CLMOD disabled; FLTMOD PWM1H, PWM1L pins to FLTDAT values- Latched; IFLTMOD disabled; FLTSRC FLT32;
__builtin_write_PWMSFR(&FCLCON1, 0xF8, &PWMKEY);
//FLTPOL disabled; CLPOL disabled; CLSRC FLT1; CLMOD disabled; FLTMOD PWM2H, PWM2L pins to FLTDAT values- Latched; IFLTMOD disabled; FLTSRC FLT32;
__builtin_write_PWMSFR(&FCLCON2, 0xF8, &PWMKEY);
//FLTPOL disabled; CLPOL disabled; CLSRC FLT1; CLMOD disabled; FLTMOD PWM3H, PWM3L pins to FLTDAT values- Latched; IFLTMOD disabled; FLTSRC FLT32;
__builtin_write_PWMSFR(&FCLCON3, 0xF8, &PWMKEY);
// PDC1 0;
PDC1 = 0x00;
// PDC2 0;
PDC2 = 0x00;
// PDC3 0;
PDC3 = 0x00;
// PHASE1 0;
PHASE1 = 0x00;
// PHASE2 0;
PHASE2 = 0x00;
// PHASE3 0;
PHASE3 = 0x00;
// DTR1 0;
DTR1 = 0x00;
// DTR2 0;
DTR2 = 0x00;
// DTR3 0;
DTR3 = 0x00;
// ALTDTR1 0;
ALTDTR1 = 0x00;
// ALTDTR2 0;
ALTDTR2 = 0x00;
// ALTDTR3 0;
ALTDTR3 = 0x00;
// TRGCMP 0;
TRIG1 = 0x00;
// TRGCMP 0;
TRIG2 = 0x00;
// TRGCMP 0;
TRIG3 = 0x00;
// TRGDIV 1; TRGSTRT 0;
TRGCON1 = 0x00;
// TRGDIV 1; TRGSTRT 0;
TRGCON2 = 0x00;
// TRGDIV 1; TRGSTRT 0;
TRGCON3 = 0x00;
// BPLL disabled; BPHH disabled; BPLH disabled; BCH disabled; FLTLEBEN disabled; PLR disabled; CLLEBEN disabled; BCL disabled; PLF disabled; PHR disabled; BPHL disabled; PHF disabled;
LEBCON1 = 0x00;
// BPLL disabled; BPHH disabled; BPLH disabled; BCH disabled; FLTLEBEN disabled; PLR disabled; CLLEBEN disabled; BCL disabled; PLF disabled; PHR disabled; BPHL disabled; PHF disabled;
LEBCON2 = 0x00;
// BPLL disabled; BPHH disabled; BPLH disabled; BCH disabled; FLTLEBEN disabled; PLR disabled; CLLEBEN disabled; BCL disabled; PLF disabled; PHR disabled; BPHL disabled; PHF disabled;
LEBCON3 = 0x00;
// LEB 0;
LEBDLY1 = 0x00;
// LEB 0;
LEBDLY2 = 0x00;
// LEB 0;
LEBDLY3 = 0x00;
// CHOPLEN disabled; CHOPHEN disabled; BLANKSEL No state blanking; CHOPSEL No state blanking;
AUXCON1 = 0x00;
// CHOPLEN disabled; CHOPHEN disabled; BLANKSEL No state blanking; CHOPSEL No state blanking;
AUXCON2 = 0x00;
// CHOPLEN disabled; CHOPHEN disabled; BLANKSEL No state blanking; CHOPSEL No state blanking;
AUXCON3 = 0x00;
// SYNCOEN disabled; SEIEN disabled; SESTAT disabled; SEVTPS 1; SYNCSRC SYNCI1; SYNCEN disabled; PTSIDL disabled; PTEN enabled; EIPU disabled; SYNCPOL disabled; 
PTCON = 0x8000;
}
 
IO init:
void PIN_MANAGER_Initialize (void)
{
/****************************************************************************
* Setting the Output Latch SFR(s)
***************************************************************************/
LATA = 0x0000;
LATB = 0xC000;
/****************************************************************************
* Setting the GPIO Direction SFR(s)
***************************************************************************/
TRISA = 0x0014;
TRISB = 0x37FF;
/****************************************************************************
* Setting the Weak Pull Up and Weak Pull Down SFR(s)
***************************************************************************/
CNPDA = 0x0000;
CNPDB = 0x0000;
CNPUA = 0x0000;
CNPUB = 0x0000;
/****************************************************************************
* Setting the Open Drain SFR(s)
***************************************************************************/
ODCA = 0x0000;
ODCB = 0x0000;
/****************************************************************************
* Setting the Analog/Digital Configuration SFR(s)
***************************************************************************/
ANSELA = 0x0010;
ANSELB = 0x0103;

/****************************************************************************
* Set the PPS
***************************************************************************/
__builtin_write_OSCCONL(OSCCON & 0xbf); // unlock PPS
RPINR18bits.U1RXR = 0x002A; //RB10->UART1:U1RX
RPOR4bits.RP43R = 0x0001; //RB11->UART1:U1TX
__builtin_write_OSCCONL(OSCCON | 0x40); // lock PPS
}
 
I must overlook something quite obvious but after studying the datasheets and PWM module explanation, so far no clue why RB14/RB15 refuse to act as PWM outputs (no signal, always low). 
Anybody any clue/hint? Other (working) example code?
 
Thanks!
regards,
Rob
 
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