Your profile indicates "Professional 1+ years with MCHP products" - - - I consider this a blunt lie Smile:
EE Student ?
I'm not sure whether you posted all relevant code (e.g. I do not see ISR code other than just clearing the IFs), but if PG1 corresponds to the 110 Hz PWM and PG2 corresponds to the 220 Hz PWM, I can tell you why these drift out-of-phase over time:
because 2*28409 != 56816
[ OK - if PGxPER is the real period in clock cycles - 1 (I didn't check this into the last detail), the reaon would be
because 2*28410 - 1 != 56817 ]
So sit down and redo your math.
The synchronization with your high frequency (45 kHz) is a bit trickier: provided you apply the same kind of PWM period scheme, you should increase this frequency to 45.100 kHz. If htis is not possible . . . well, there are other ways to force synchronization by skipping DC values in the HF PWM. It's just that 45000 is no integer multipple of 110, so no "natural" syncronicity can be achieved.