• AVR Freaks

Helpful ReplyHot!pic32mz flash read write

Author
Lucandrelli
New Member
  • Total Posts : 5
  • Reward points : 0
  • Joined: 2010/07/09 02:29:55
  • Location: 0
  • Status: offline
2021/01/18 03:21:39 (permalink)
0

pic32mz flash read write

Hi everyone, I have a problem accessing and saving in Flash, I work with a pic32mz2048EFM144 I am trying to modify an int32 using the following code
   
   ....
   variable = *(int*)ROMDATA1_ADDR;
   NVM_WriteWord((void*)ROMDATA1_ADDR, 0xbacafeb1);
   variable = *(int*)ROMDATA1_ADDR;
   
   
   
   
unsigned int NVM_WriteWord (void* address, unsigned int data)
{
    unsigned int res = 0;

    NVMDATA0 = data;
    /* convert virtual address to physical address and load into NVMADDR register */
    NVMADDR = ((unsigned int) address & 0x1FFFFFFF);
    /* Unlock and Perform the NVM operation */
    res = NVM_Unlock (NVM_OPERATION_WRITE_WORD);

    return res;
}

unsigned int NVM_Unlock (unsigned int nvmop)
{
    unsigned int status = 0;
    /* Suspend or Disable all Interrupts */
    asm volatile ("di %0" : "=r" (status));

    /* clearing error bits before performing an NVM operation */
    NVMCONCLR = NVM_NO_OPERATION_MASK;

    /* Enable Flash Write/Erase Operations and Select Flash operation to perform */
    NVMCON = (NVM_WRITE_OR_ERASE_ENABLE_BIT | nvmop);

 // wait at least 6 us for LVD start-up
 // assume we're running at max frequency
 // (80 MHz) so we're always safe
 {
  unsigned long t0 = _CP0_GET_COUNT();
  while (_CP0_GET_COUNT() - t0 < (80 / 2) * 12);
 }

    NVMKEY = NVMKEY1;
    NVMKEY = NVMKEY2;

    /* Start the operation using the Set Register */
    NVMCONSET = NVM_WRITE_CONTROL_BIT;

    /* Wait for operation to complete */
    while (NVMCON & NVM_WRITE_CONTROL_BIT);

    /* Restore Interrupts */
// if (status & 0x00000001) {
     asm volatile ("ei");
// } else {
// asm volatile ("di");
// }

    /* Disable NVM write enable */
    NVMCONCLR = NVM_WRITE_OR_ERASE_ENABLE_BIT;

    /* Return WRERR and LVDERR Error Status Bits */
    return (NVMCON & NVM_WRERR_LVDERR_MASK);
}

 
but in debug with icd4 i don't see what i expect: instead of seeing "variable" changed after writing on rom I continue to see 0xffffffff.
Then I reset the processor with the debugger and go ahead to the code lines and at the first read on the Flash I see the loaded data loaded before the reset.
Anyone have any idea where I'm wrong ??
Thanks in advance to anyone who can help me.
Greetings
#1
ric
Super Member
  • Total Posts : 29861
  • Reward points : 0
  • Joined: 2003/11/07 12:41:26
  • Location: Australia, Melbourne
  • Status: online
Re: pic32mz flash read write 2021/01/18 03:40:11 (permalink) ☄ Helpfulby Lucandrelli 2021/01/18 04:53:15
5 (2)
Lucandrelli
Anyone have any idea where I'm wrong ??

Faulty expectation of how the debugger works.
The "code memory" view just shows you what MPLABX thinks is in the code memory, it is NOT a live view.
Therefore, it is oblivious to any self modifying code changes until you read the PIC's memory back into MPLABX.
 

I also post at: PicForum
Links to useful PIC information: http://picforum.ric323.co...opic.php?f=59&t=15
NEW USERS: Posting images, links and code - workaround for restrictions.
To get a useful answer, always state which PIC you are using!
#2
Lucandrelli
New Member
  • Total Posts : 5
  • Reward points : 0
  • Joined: 2010/07/09 02:29:55
  • Location: 0
  • Status: offline
Re: pic32mz flash read write 2021/01/18 04:54:52 (permalink)
0
Thanks a lot for your answer, I'll tring whith a real test, not in debugging mode.
#3
NKurzman
A Guy on the Net
  • Total Posts : 19146
  • Reward points : 0
  • Joined: 2008/01/16 19:33:48
  • Location: 0
  • Status: offline
Re: pic32mz flash read write 2021/01/18 07:00:29 (permalink)
4 (1)
While you’re in debugging you can read the memory back. You need to click the read backbutton.
#4
cirilo.b
Junior Member
  • Total Posts : 59
  • Reward points : 0
  • Joined: 2020/09/08 18:40:42
  • Location: 0
  • Status: offline
Re: pic32mz flash read write 2021/01/18 12:55:44 (permalink)
4 (1)
If ROMDATA1_ADDR is in a cached region then it may not show the correct data when you dereference it since the data in cache maybe used.
#5
Jump to:
© 2021 APG vNext Commercial Version 4.5