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Hot!PIC32MK Tcy

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Marco PIC
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2020/11/11 10:32:29 (permalink)
4 (1)

PIC32MK Tcy

Hi everybody,
I’m using a PIC32MK0512MCF064.
According to the Quadrature encoder manual DS60001346, the encoder inputs are filtered using Tcy.
 
My question is: for a PIC32MK what is Tcy?
Tcy = 1/Fsys?
Tcy = 2/Fsys?
Or something else?
 
Thanks in advance.
Marco
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    al_bin
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    Re: PIC32MK Tcy 2020/11/11 12:19:46 (permalink)
    0
    1/PBCLK2
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    Mysil
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    Re: PIC32MK Tcy 2020/11/11 12:35:19 (permalink)
    4 (1)
    Hi,
    In all PIC32M microcontrollers, Tcy = 1/Fsys
    So if you have set up the oscillators to run at 120 MHz, then instruction clock time is 8.33 ns.
    The CPU is pipelined, so each instruction individually use 5+ Tcy before it is completed,
    but this do not matter for the Quadrature encoder interface.
     
    But there is a Peripheral Clock signal:  PBCLK2   feeding the QEI peripheral from the system clock frequency
    controlled by  PB2DIV  register, and it may be set to divide down the system clock frequency.
    So see what setting is default for  PBDIV  field in that register,
    what setting is actually used, and what that setting means.
     
        Mysil
     
    post edited by Mysil - 2020/11/22 09:13:51
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    Marco PIC
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    Re: PIC32MK Tcy 2020/11/12 14:33:23 (permalink)
    0
    Thanks for your answers, but I need some clarifications. 

    I refer to the datasheet “PIC32MK general purpose and motor control family”:http://ww1.microchip.com/downloads/en/DeviceDoc/PIC32MK_GP_MC_Familly_Datasheet_60001402G.pdf

    1)In table 9-1  “System and peripheral clock distribution”, the QEI modules do not appear. 

    2) In Figure 30-1 “QEI block diagram” PBCLK2 shows up feeding a prescaler but, according to the QEIxCON description (pag.519), it is used for “Interval timer, Main timer (position counter), velocity counter and index counter”. 

    3) Last but not least, in Table 36-37 “Quadrature encoder timing requirements” it is clearly stated that Tcy is used to filter the encoder signals and, as far as I know Tcy is not related to the peripherals clocks. 

    So, to calculate the behavior of the encoder filters I have to use the relation Tcy = 1/Fsys.
    Is this correct? 

    Marco
    post edited by Marco PIC - 2020/11/12 15:36:31
    #4
    Mysil
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    Re: PIC32MK Tcy 2020/11/12 20:02:54 (permalink)
    0
    Hi,
    DS60001402G
     
    1) You are right, I cannot find QEI in table 9-1:  either.
     
    2)  PBCLK2 show up in several places in Figure 30-1:  "QEI block diagram",
         it is input to QFDIV,    Quadrature Decoder Logic, and to INTDIV.
     
    3)  You could log a Support case, and ask Microchip what is correct.
         You may refer to this thread, pointing out that the Datasheet seem inconsistent and unclear.
     
    I would anyway set  PBDIV2bits.PBDIV = 0;   //  for  PBCLK2  same as system clock.
     
    Regards,
        Mysil
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    Marco PIC
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    Re: PIC32MK Tcy 2020/11/14 01:39:43 (permalink)
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    Hi Mysil,
    Thanks for your advise.

    Marco
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    al_bin
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    Mysil
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    Re: PIC32MK Tcy 2020/11/14 12:03:26 (permalink)
    5 (1)
    Yes, both those documents have been mentioned earlier in this thread, and have been studied by the original poster.
    The original poster have also spotted that TABLE 9-1:  Clock Distribution,
    have no mention of QEI quadrature decoder,
    so this table may have been copied from a similar device without a QEI peripheral.
     
    Figure 30-1:  QEI Block Diagram in datasheet for PIC32MK,
    there is PBCLK2 feeding in to QFDIV divider, and then into filter logic.
     
    In the corresponding figure in FRM48,
    Figure 43-2:  Quadrature Encoder Interface (QEI) Module Block Diagram,
    there is unspecified  PBCLK   that feed into QFDIV divider, and then in to filter logic.
     
    In Figure 43-9:   Block Diagram of Digital Noise Filter,
    there is a TCY appearing from the left, feeding the first latch, and QFDIV divider for clocking the shift register.
     
    Now, there is the general definition, that if there are difference in details
    between FRM document and Datasheet for a specific device type,
    then it is Datasheet that shall have authority.
     
    I would be highly surprised, if this TCY were any different from PBCLK2 in PIC32MK...

    This may be checked by setting:   PB2DIVbits.PBDIV   to it's highest value, giving the largest divisor,
    QFDIV to a suitable value, FLTREN to 1,
    and then test what frequency of input signals the quadrature decoder is able to resolve correctly.
     
        Mysil
     
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    Marco PIC
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    Re: PIC32MK Tcy 2020/11/19 12:25:36 (permalink)
    0
    Hi Mysil,
    I agree with you: the best thing is to test it.
    I will do It and let you know the result ASAP.

    Regards
    Marco
    post edited by Marco PIC - 2020/11/21 07:57:46
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    Marco PIC
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    Re: PIC32MK Tcy 2020/11/22 08:37:55 (permalink)
    5 (3)
    Hi,
    I made some tests and, as has been stated in this thread, the QEI filters use definitely PBCLK2.
    So, in DS60001402G, table 36-37, Tcy is wrong and must be read as PBCLK2.
    The same in DS60001346B, figure 43-9.

    Marco
    post edited by Marco PIC - 2020/11/22 08:41:36
    #10
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