Debug & programming work on PIC18LF25K83 but not on PIC18LF26K83
I'm working on a project born on a PIC18LF25K83 but due to the new features it would max out the FLASH memory, so we moved to PIC18LF26K83.
And here comes the funny part:
1) we changed the device on the board and flashed the code, it worked.
2) later I needed to run it in debug mode to check some things and it didn't worked. Checked few things: the device wasn't erased.
3) I tried to program it in runtime mode, it didn't worked.
Connecting to MPLAB PICkit 3...
Currently loaded firmware on PICkit 3
Firmware Suite Version.....01.51.08
Firmware type..............Enhanced Midrange
Target voltage detected
Target device PIC18LF26K83 found.
Device ID Revision = a002
The following memory area(s) will be read:
The following memory area(s) will be programmed:
program memory: start address = 0x0, end address = 0x8b7f
User Id Memory
Address: 54 Expected Value: ef9d Received Value: ef14
Failed to program device
4) I changed the device in the project properties back to PIC18LF25K83, rebuild the project and flashed: it worked.
Same environment, same configuration bits, same compiler, same programmer, same board, same device.
Here are the configuration bits:
// PIC18LF26K83 Configuration Bit Settings
// 'C' source line config statements
#pragma config FEXTOSC = XT // External Oscillator Selection (XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power)
#pragma config RSTOSC = EXTOSC // Reset Oscillator Selection (EXTOSC operating per FEXTOSC bits (device manufacturing default))
#pragma config CLKOUTEN = ON // Clock out Enable bit (CLKOUT function is enabled)
#pragma config PR1WAY = OFF // PRLOCKED One-Way Set Enable bit (PRLOCK bit can be set and cleared repeatedly)
#pragma config CSWEN = ON // Clock Switch Enable bit (Writing to NOSC and NDIV is allowed)
#pragma config FCMEN = ON // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)
#pragma config MCLRE = EXTMCLR // MCLR Enable bit (If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR )
#pragma config PWRTS = PWRT_1 // Power-up timer selection bits (PWRT set at 1ms)
#pragma config MVECEN = ON // Multi-vector enable bit (Multi-vector enabled, Vector table used for interrupts)
#pragma config IVT1WAY = OFF // IVTLOCK bit One-way set enable bit (IVTLOCK bit can be cleared and set repeatedly)
#pragma config LPBOREN = ON // Low Power BOR Enable bit (ULPBOR enabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled , SBOREN bit is ignored)
#pragma config BORV = VBOR_2P45 // Brown-out Reset Voltage Selection bits (Brown-out Reset Voltage (VBOR) set to 2.45V)
#pragma config ZCD = OFF // ZCD Disable bit (ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON)
#pragma config PPS1WAY = ON // PPSLOCK bit One-Way Set Enable bit (PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle)
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config DEBUG = OFF // Debugger Enable bit (Background debugger disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Extended Instruction Set and Indexed Addressing Mode disabled)
#pragma config WDTCPS = WDTCPS_31// WDT Period selection bits (Divider ratio 1:65536; software control of WDTPS)
#pragma config WDTE = ON // WDT operating mode (WDT enabled regardless of sleep)
#pragma config WDTCWS = WDTCWS_7// WDT Window Select bits (window always open (100%); software control; keyed access not required)
#pragma config WDTCCS = SC // WDT input clock selector (Software Control)
#pragma config BBSIZE = BBSIZE_512// Boot Block Size selection bits (Boot Block size is 512 words)
#pragma config BBEN = OFF // Boot Block enable bit (Boot block disabled)
#pragma config SAFEN = OFF // Storage Area Flash enable bit (SAF disabled)
#pragma config WRTAPP = OFF // Application Block write protection bit (Application Block not write protected)
#pragma config WRTB = OFF // Configuration Register Write Protection bit (Configuration registers (300000-30000Bh) not write-protected)
#pragma config WRTC = OFF // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
#pragma config WRTSAF = OFF // SAF Write protection bit (SAF not Write Protected)
#pragma config LVP = OFF // Low Voltage Programming Enable bit (HV on MCLR/VPP must be used for programming)
#pragma config CP = OFF // PFM and Data EEPROM Code Protection bit (PFM and Data EEPROM code protection disabled)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
In the programming interface R14 has been shorted and C7 has been removed.
VCC is 2.5V supplied by an on board DC/DC, the system clock runs on a 4MHz xtal and the programmer is a PicKit3.
Thanks in advance for attention and help.